x86: Add support for loading 32-bit and 80-bit floats in the x87

The x87 FPU supports three floating point formats: 32-bit, 64-bit, and
80-bit floats. The current gem5 implementation supports 32-bit and
64-bit floats, but only works correctly for 64-bit floats. This
changeset fixes the 32-bit float handling by correctly loading and
rounding (using truncation) 32-bit floats instead of simply truncating
the bit pattern.

80-bit floats are loaded by first loading the 80-bits of the float to
two temporary integer registers. A micro-op (cvtint_fp80) then
converts the contents of the two integer registers to the internal FP
representation (double). Similarly, when storing an 80-bit float,
there are two conversion routines (ctvfp80h_int and cvtfp80l_int) that
convert an internal FP register to 80-bit and stores the upper 64-bits
or lower 32-bits to an integer register, which is the written to
memory using normal integer stores.

1 files changed, 4 insertions, 4 deletions

diff --git a/src/arch/x86/isa/decoder/x87.isa b/src/arch/x86/isa/decoder/x87.isa
index c29e8a334..03ca8be07 100644
--- a/src/arch/x86/isa/decoder/x87.isa
+++ b/src/arch/x86/isa/decoder/x87.isa
@@ -67,11 +67,11 @@ format WarnUnimpl {
                     0x0: fnop();
                     default: Inst::UD2();
                 }
-                default: fst();
+                default: Inst::FST(Ed);
             }
             0x3: decode MODRM_MOD {
                 0x3: Inst::UD2();
-                default: fstp();
+                default: Inst::FSTP(Ed);
             }
             0x4: decode MODRM_MOD {
                 0x3: decode MODRM_RM {
@@ -189,7 +189,7 @@ format WarnUnimpl {
             0x5: decode MODRM_MOD {
                 0x3: fucomi();
                 // 80-bit load
-                default: fld();
+                default: Inst::FLD80(M);
             }
             0x6: decode MODRM_MOD {
                 0x3: fcomi();
@@ -197,7 +197,7 @@ format WarnUnimpl {
             }
             0x7: decode MODRM_MOD {
                 0x3: Inst::UD2();
-                default: fstp();
+                default: Inst::FST80P(M);
             }
         }
         //0x4: esc4();