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| author | Gabe Black <gblack@eecs.umich.edu> | 2007-10-12 16:37:55 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2007-10-12 16:37:55 -0700 |
| commit | 9498e536c0231b808669f2bacb4c0628d1ec309a (patch) | |
| tree | 13edd1623e87077269a03b10a37a66bf61f4f969 /src/arch/x86/isa/decoder | |
| parent | 8b35bd6fe79ce069428431a4edbe43b8373f7e87 (diff) | |
| download | gem5-9498e536c0231b808669f2bacb4c0628d1ec309a.tar.xz | |
X86: Implement MSR reads and writes and the wrsmr and rdmsr instructions.
There are no priviledge checks, so these instructions will all work in all
modes.
--HG--
extra : convert_revision : ff893eb569313d8aecbfffb47bcbd1c2d65cd393
Diffstat (limited to 'src/arch/x86/isa/decoder')
| -rw-r--r-- | src/arch/x86/isa/decoder/two_byte_opcodes.isa | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/x86/isa/decoder/two_byte_opcodes.isa b/src/arch/x86/isa/decoder/two_byte_opcodes.isa index eae994706..0482fdf23 100644 --- a/src/arch/x86/isa/decoder/two_byte_opcodes.isa +++ b/src/arch/x86/isa/decoder/two_byte_opcodes.isa @@ -211,9 +211,9 @@ default: Inst::UD2(); } 0x06: decode OPCODE_OP_BOTTOM3 { - 0x0: wrmsr(); + 0x0: Inst::WRMSR(); 0x1: rdtsc(); - 0x2: rdmsr(); + 0x2: Inst::RDMSR(); 0x3: rdpmc(); 0x4: sysenter(); 0x5: sysexit(); |