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| author | Gabe Black <gblack@eecs.umich.edu> | 2009-02-25 10:17:14 -0800 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2009-02-25 10:17:14 -0800 |
| commit | aa7bc1be74beac674cc4feb4fece534de10379e3 (patch) | |
| tree | f5c4a764448634e062d2455fc0df90699fb41d08 /src/arch/x86/isa/decoder | |
| parent | 08f3a126d540a88474a654720ecc7ceab9e0c246 (diff) | |
| download | gem5-aa7bc1be74beac674cc4feb4fece534de10379e3.tar.xz | |
X86: Implement the LTR instruction.
Diffstat (limited to 'src/arch/x86/isa/decoder')
| -rw-r--r-- | src/arch/x86/isa/decoder/two_byte_opcodes.isa | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/x86/isa/decoder/two_byte_opcodes.isa b/src/arch/x86/isa/decoder/two_byte_opcodes.isa index 3cdfa48bb..67845fe8d 100644 --- a/src/arch/x86/isa/decoder/two_byte_opcodes.isa +++ b/src/arch/x86/isa/decoder/two_byte_opcodes.isa @@ -94,7 +94,7 @@ 0x0: sldt_Mw_or_Rv(); 0x1: str_Mw_or_Rv(); 0x2: lldt_Mw_or_Rv(); - 0x3: ltr_Mw_or_Rv(); + 0x3: Inst::LTR(Ew); 0x4: verr_Mw_or_Rv(); 0x5: verw_Mw_or_Rv(); //0x6: jmpe_Ev(); // IA-64 |