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authorGabe Black <gblack@eecs.umich.edu>2007-06-20 19:08:04 +0000
committerGabe Black <gblack@eecs.umich.edu>2007-06-20 19:08:04 +0000
commit77aa98d0f84343445588b3c137463e4eba4c2909 (patch)
treeb041ed55b4c999edfdb37fa383f1f821e62869a4 /src/arch/x86/isa/formats
parentc4ebfa850e141ae7b33184f061874f9576bf5a54 (diff)
downloadgem5-77aa98d0f84343445588b3c137463e4eba4c2909.tar.xz
Implement rip relative addressing and put in some missing loads and stores.
--HG-- extra : convert_revision : 99053414cef40f13c5226871a72909b2622d8c26
Diffstat (limited to 'src/arch/x86/isa/formats')
-rw-r--r--src/arch/x86/isa/formats/multi.isa4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/x86/isa/formats/multi.isa b/src/arch/x86/isa/formats/multi.isa
index 37b28fe64..97777f727 100644
--- a/src/arch/x86/isa/formats/multi.isa
+++ b/src/arch/x86/isa/formats/multi.isa
@@ -70,8 +70,8 @@ def format Inst(*opTypeSet) {{
def format MultiInst(switchVal, *opTypeSets) {{
switcher = {}
for (count, opTypeSet) in zip(xrange(len(opTypeSets)), opTypeSets):
- switcher[count] = (Name, opTypeSet, EmulEnv())
- blocks = doSplitDecode(specializeInst, switchVal, switcher)
+ switcher[count] = (specializeInst, Name, opTypeSet, EmulEnv())
+ blocks = doSplitDecode(switchVal, switcher)
(header_output, decoder_output,
decode_block, exec_output) = blocks.makeList()
}};