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authorSteve Reinhardt <stever@eecs.umich.edu>2007-07-22 10:40:45 -0400
committerSteve Reinhardt <stever@eecs.umich.edu>2007-07-22 10:40:45 -0400
commit03730edc45e2e00bdec58dabc84e94c632634a1a (patch)
treeaffdbffcb174a9cfc0de933f3c240ae5f2813292 /src/arch/x86/isa/insts/compare_and_test/test.py
parent658eeee50715d9fd334ae3fd3e0e21b6db6de0c4 (diff)
parent2cd454d102b5da828b0fbf4b66ef1a24875e69f6 (diff)
downloadgem5-03730edc45e2e00bdec58dabc84e94c632634a1a.tar.xz
Merge Gabe's changes with mine.
--HG-- extra : convert_revision : f50ed42e7acb3f11e610fd6976eaa8df0c6ba2ab
Diffstat (limited to 'src/arch/x86/isa/insts/compare_and_test/test.py')
-rw-r--r--src/arch/x86/isa/insts/compare_and_test/test.py16
1 files changed, 8 insertions, 8 deletions
diff --git a/src/arch/x86/isa/insts/compare_and_test/test.py b/src/arch/x86/isa/insts/compare_and_test/test.py
index 89d406912..8da33899a 100644
--- a/src/arch/x86/isa/insts/compare_and_test/test.py
+++ b/src/arch/x86/isa/insts/compare_and_test/test.py
@@ -57,39 +57,39 @@ microcode = '''
def macroop TEST_M_R
{
ld t1, ds, [scale, index, base], disp
- and t0, t1, reg
+ and t0, t1, reg, flags=(SF, ZF, PF)
};
def macroop TEST_P_R
{
rdip t7
- ld t1, ds, [scale, index, base], disp
- and t0, t1, reg
+ ld t1, ds, [0, t0, t7], disp
+ and t0, t1, reg, flags=(SF, ZF, PF)
};
def macroop TEST_R_R
{
- and t0, reg, regm
+ and t0, reg, regm, flags=(SF, ZF, PF)
};
def macroop TEST_M_I
{
ld t1, ds, [scale, index, base], disp
limm t2, imm
- and t0, t1, t2
+ and t0, t1, t2, flags=(SF, ZF, PF)
};
def macroop TEST_P_I
{
rdip t7
- ld t1, ds, [scale, index, base], disp
+ ld t1, ds, [0, t0, t7], disp
limm t2, imm
- and t0, t1, t2
+ and t0, t1, t2, flags=(SF, ZF, PF)
};
def macroop TEST_R_I
{
limm t1, imm
- and t0, reg, t1
+ and t0, reg, t1, flags=(SF, ZF, PF)
};
'''