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| author | Gabe Black <gblack@eecs.umich.edu> | 2007-07-18 17:47:40 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2007-07-18 17:47:40 -0700 |
| commit | dbf361128a1e9940ada0af32d9d0d728d08b8943 (patch) | |
| tree | a479c678b3942783c733b0aa3451429f1101341c /src/arch/x86/isa/insts/control_transfer/xreturn.py | |
| parent | 99310a1d939e052ab1ecc949e1b2d7974daddd60 (diff) | |
| download | gem5-dbf361128a1e9940ada0af32d9d0d728d08b8943.tar.xz | |
Implement near returns.
--HG--
extra : convert_revision : 3d6e8a976d31cb016a4b78200716b0ece155137a
Diffstat (limited to 'src/arch/x86/isa/insts/control_transfer/xreturn.py')
| -rw-r--r-- | src/arch/x86/isa/insts/control_transfer/xreturn.py | 16 |
1 files changed, 11 insertions, 5 deletions
diff --git a/src/arch/x86/isa/insts/control_transfer/xreturn.py b/src/arch/x86/isa/insts/control_transfer/xreturn.py index aaffa2b92..1e8e0ba55 100644 --- a/src/arch/x86/isa/insts/control_transfer/xreturn.py +++ b/src/arch/x86/isa/insts/control_transfer/xreturn.py @@ -53,8 +53,14 @@ # # Authors: Gabe Black -microcode = "" -#let {{ -# class RET(Inst): -# "GenFault ${new UnimpInstFault}" -#}}; +microcode = ''' +def macroop RET +{ + # Make the default data size of rets 64 bits in 64 bit mode + .adjust_env oszIn64Override + + ld t1, ss, [0, t0, rsp] + addi rsp, rsp, dsz + wripi t1, 0 +}; +''' |