diff options
| author | Gabe Black <gblack@eecs.umich.edu> | 2007-08-04 20:12:54 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2007-08-04 20:12:54 -0700 |
| commit | e410a925df8d37f386c97dc7cdd9a78347ce4700 (patch) | |
| tree | b4102987453b1303051dfeea61aa1a45c2e5e75f /src/arch/x86/isa/insts/data_conversion | |
| parent | ced6cbcccf4540358093f060dad4d59ad6557d6a (diff) | |
| download | gem5-e410a925df8d37f386c97dc7cdd9a78347ce4700.tar.xz | |
X86: Start implementing segmentation support.
Make instructions observe segment prefixes, default segment rules, segment
base addresses.
Also fix some microcode and add sib and riprel "keywords" to the x86
specialization of the microassembler.
--HG--
extra : convert_revision : be5a3b33d33f243ed6e1ad63faea8495e46d0ac9
Diffstat (limited to 'src/arch/x86/isa/insts/data_conversion')
| -rw-r--r-- | src/arch/x86/isa/insts/data_conversion/sign_extension.py | 14 |
1 files changed, 0 insertions, 14 deletions
diff --git a/src/arch/x86/isa/insts/data_conversion/sign_extension.py b/src/arch/x86/isa/insts/data_conversion/sign_extension.py index 6a2612c3c..0bdd4036c 100644 --- a/src/arch/x86/isa/insts/data_conversion/sign_extension.py +++ b/src/arch/x86/isa/insts/data_conversion/sign_extension.py @@ -65,17 +65,3 @@ def macroop CQO_R_R { sra regm, regm, "env.dataSize * 8 - 1" }; ''' -#let {{ -# class CBW(Inst): -# "GenFault ${new UnimpInstFault}" -# class CWDE(Inst): -# "GenFault ${new UnimpInstFault}" -# class CDQE(Inst): -# "GenFault ${new UnimpInstFault}" -# class CWD(Inst): -# "GenFault ${new UnimpInstFault}" -# class CDQ(Inst): -# "GenFault ${new UnimpInstFault}" -# class CQO(Inst): -# "GenFault ${new UnimpInstFault}" -#}}; |