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| author | Ali Saidi <saidi@eecs.umich.edu> | 2008-09-10 14:26:15 -0400 |
|---|---|---|
| committer | Ali Saidi <saidi@eecs.umich.edu> | 2008-09-10 14:26:15 -0400 |
| commit | 3a3e356f4e61e86f6f1427dd85cf1e41fa9125c0 (patch) | |
| tree | c9e147a14bcab9e4767ad13a00ac4a375044c441 /src/arch/x86/isa/insts/general_purpose/cache_and_memory_management.py | |
| parent | 09a8fb0b5263d4b41b8206ce075a3f6923907d65 (diff) | |
| download | gem5-3a3e356f4e61e86f6f1427dd85cf1e41fa9125c0.tar.xz | |
style: Remove non-leading tabs everywhere they shouldn't be. Developers should configure their editors to not insert tabs
Diffstat (limited to 'src/arch/x86/isa/insts/general_purpose/cache_and_memory_management.py')
| -rw-r--r-- | src/arch/x86/isa/insts/general_purpose/cache_and_memory_management.py | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/src/arch/x86/isa/insts/general_purpose/cache_and_memory_management.py b/src/arch/x86/isa/insts/general_purpose/cache_and_memory_management.py index b5fc43fcd..08b842825 100644 --- a/src/arch/x86/isa/insts/general_purpose/cache_and_memory_management.py +++ b/src/arch/x86/isa/insts/general_purpose/cache_and_memory_management.py @@ -56,17 +56,17 @@ microcode = "" #let {{ # class LFENCE(Inst): -# "GenFault ${new UnimpInstFault}" +# "GenFault ${new UnimpInstFault}" # class SFENCE(Inst): -# "GenFault ${new UnimpInstFault}" +# "GenFault ${new UnimpInstFault}" # class MFENCE(Inst): -# "GenFault ${new UnimpInstFault}" +# "GenFault ${new UnimpInstFault}" # class PREFETCHlevel(Inst): -# "GenFault ${new UnimpInstFault}" +# "GenFault ${new UnimpInstFault}" # class PREFETCH(Inst): -# "GenFault ${new UnimpInstFault}" +# "GenFault ${new UnimpInstFault}" # class PREFETCHW(Inst): -# "GenFault ${new UnimpInstFault}" +# "GenFault ${new UnimpInstFault}" # class CLFLUSH(Inst): -# "GenFault ${new UnimpInstFault}" +# "GenFault ${new UnimpInstFault}" #}}; |