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| author | Gabe Black <gblack@eecs.umich.edu> | 2008-10-12 15:33:17 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2008-10-12 15:33:17 -0700 |
| commit | 77c0e1d1102af4c023bcd4609022b1600cadfea5 (patch) | |
| tree | 7050d67d8a3aceaedd2695dcfbe2e38580ee7d5a /src/arch/x86/isa/insts/general_purpose/compare_and_test | |
| parent | 8384ff7d6c4460a966aec3b65a0af13e71bd76a2 (diff) | |
| download | gem5-77c0e1d1102af4c023bcd4609022b1600cadfea5.tar.xz | |
X86: Create a SeqOp class of microops and make Br one of them.
Diffstat (limited to 'src/arch/x86/isa/insts/general_purpose/compare_and_test')
| -rw-r--r-- | src/arch/x86/isa/insts/general_purpose/compare_and_test/bit_scan.py | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/src/arch/x86/isa/insts/general_purpose/compare_and_test/bit_scan.py b/src/arch/x86/isa/insts/general_purpose/compare_and_test/bit_scan.py index bfc0af900..22364e038 100644 --- a/src/arch/x86/isa/insts/general_purpose/compare_and_test/bit_scan.py +++ b/src/arch/x86/isa/insts/general_purpose/compare_and_test/bit_scan.py @@ -86,7 +86,7 @@ def macroop BSR_R_R { # Determine if the input was zero, and also move it to a temp reg. movi t1, t1, t0, dataSize=8 and t1, regm, regm, flags=(ZF,) - bri t0, label("end"), flags=(CZF,) + br label("end"), flags=(CZF,) # Zero out the result register movi reg, reg, 0x0 @@ -137,7 +137,7 @@ def macroop BSR_R_M { # Determine if the input was zero, and also move it to a temp reg. and t1, t1, t1, flags=(ZF,) - bri t0, label("end"), flags=(CZF,) + br label("end"), flags=(CZF,) # Zero out the result register movi reg, reg, 0x0 @@ -189,7 +189,7 @@ def macroop BSR_R_P { # Determine if the input was zero, and also move it to a temp reg. and t1, t1, t1, flags=(ZF,) - bri t0, label("end"), flags=(CZF,) + br label("end"), flags=(CZF,) # Zero out the result register movi reg, reg, 0x0 @@ -237,7 +237,7 @@ def macroop BSF_R_R { # Determine if the input was zero, and also move it to a temp reg. mov t1, t1, t0, dataSize=8 and t1, regm, regm, flags=(ZF,) - bri t0, label("end"), flags=(CZF,) + br label("end"), flags=(CZF,) # Zero out the result register movi reg, reg, 0 @@ -292,7 +292,7 @@ def macroop BSF_R_M { # Determine if the input was zero, and also move it to a temp reg. and t1, t1, t1, flags=(ZF,) - bri t0, label("end"), flags=(CZF,) + br label("end"), flags=(CZF,) # Zero out the result register mov reg, reg, t0 @@ -348,7 +348,7 @@ def macroop BSF_R_P { # Determine if the input was zero, and also move it to a temp reg. and t1, t1, t1, flags=(ZF,) - bri t0, label("end"), flags=(CZF,) + br label("end"), flags=(CZF,) # Zero out the result register mov reg, reg, t0 |