diff options
author | Gabe Black <gblack@eecs.umich.edu> | 2009-07-16 09:27:56 -0700 |
---|---|---|
committer | Gabe Black <gblack@eecs.umich.edu> | 2009-07-16 09:27:56 -0700 |
commit | 80c834ccac0b92cccd9756d4a2ec4cd4b46b6711 (patch) | |
tree | 151624c71a962c03f5d916f1bd0e516610d4c3ba /src/arch/x86/isa/insts/general_purpose/control_transfer/interrupts_and_exceptions.py | |
parent | 3f9b0cc5ca126950fcce5a9b5ebf2f485ee812f2 (diff) | |
download | gem5-80c834ccac0b92cccd9756d4a2ec4cd4b46b6711.tar.xz |
X86: Fix a number of places where the wrong form of a microop was used.
Diffstat (limited to 'src/arch/x86/isa/insts/general_purpose/control_transfer/interrupts_and_exceptions.py')
-rw-r--r-- | src/arch/x86/isa/insts/general_purpose/control_transfer/interrupts_and_exceptions.py | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/x86/isa/insts/general_purpose/control_transfer/interrupts_and_exceptions.py b/src/arch/x86/isa/insts/general_purpose/control_transfer/interrupts_and_exceptions.py index 358fe43c8..a9ad611b7 100644 --- a/src/arch/x86/isa/insts/general_purpose/control_transfer/interrupts_and_exceptions.py +++ b/src/arch/x86/isa/insts/general_purpose/control_transfer/interrupts_and_exceptions.py @@ -143,7 +143,7 @@ processCSDescriptor: # appropriate/other RIP checks. # if temp_RIP > CS.limit throw #GP(0) rdlimit t6, cs, dataSize=8 - subi t0, t1, t6, flags=(ECF,) + sub t0, t1, t6, flags=(ECF,) fault "new GeneralProtection(0)", flags=(CECF,) #(temp_CPL!=CPL) |