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author | Gabe Black <gblack@eecs.umich.edu> | 2007-10-02 22:19:53 -0700 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2007-10-02 22:19:53 -0700 |
commit | 4049c9f76afd17c983eed923940eb7338229561d (patch) | |
tree | 75cd2ddc8713126414e94de2ff99f1cbc6126b36 /src/arch/x86/isa/insts/general_purpose/control_transfer/xreturn.py | |
parent | 7c521db9de281326f35a5743e1b4777a8e2bb2f4 (diff) | |
download | gem5-4049c9f76afd17c983eed923940eb7338229561d.tar.xz |
X86: Put ldst into the microcode (the earlier changeset didn't really).
Also clean things up as much as possible so that faulting won't break an
instruction. More microops which verify addresses are needed.
--HG--
extra : convert_revision : 7c6050cb4798d287fe7d3cc4bb8c20dfa40ad2be
Diffstat (limited to 'src/arch/x86/isa/insts/general_purpose/control_transfer/xreturn.py')
-rw-r--r-- | src/arch/x86/isa/insts/general_purpose/control_transfer/xreturn.py | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/arch/x86/isa/insts/general_purpose/control_transfer/xreturn.py b/src/arch/x86/isa/insts/general_purpose/control_transfer/xreturn.py index 1efddf1d2..8993f5ac4 100644 --- a/src/arch/x86/isa/insts/general_purpose/control_transfer/xreturn.py +++ b/src/arch/x86/isa/insts/general_purpose/control_transfer/xreturn.py @@ -60,6 +60,7 @@ def macroop RET_NEAR .adjust_env oszIn64Override ld t1, ss, [1, t0, rsp] + # Check address of return addi rsp, rsp, dsz wripi t1, 0 }; @@ -71,6 +72,7 @@ def macroop RET_NEAR_I limm t2, imm ld t1, ss, [1, t0, rsp] + # Check address of return addi rsp, rsp, dsz add rsp, rsp, t2 wripi t1, 0 |