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author | Gabe Black <gblack@eecs.umich.edu> | 2009-07-08 23:01:54 -0700 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2009-07-08 23:01:54 -0700 |
commit | d029110fa15346c705bf6a47ef9cf65ad3bcf234 (patch) | |
tree | 16d732f90fab989d0bdce2dd82b9b630e095a2f1 /src/arch/x86/isa/insts/general_purpose/control_transfer | |
parent | 15afc87f7cb5994c308422d2b01e1c0723a07e5e (diff) | |
download | gem5-d029110fa15346c705bf6a47ef9cf65ad3bcf234.tar.xz |
X86: Fix a bug in IRET_PROT's microcode. The immediate form of sra was intended.
Diffstat (limited to 'src/arch/x86/isa/insts/general_purpose/control_transfer')
-rw-r--r-- | src/arch/x86/isa/insts/general_purpose/control_transfer/interrupts_and_exceptions.py | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/x86/isa/insts/general_purpose/control_transfer/interrupts_and_exceptions.py b/src/arch/x86/isa/insts/general_purpose/control_transfer/interrupts_and_exceptions.py index 8203f7c2c..358fe43c8 100644 --- a/src/arch/x86/isa/insts/general_purpose/control_transfer/interrupts_and_exceptions.py +++ b/src/arch/x86/isa/insts/general_purpose/control_transfer/interrupts_and_exceptions.py @@ -158,7 +158,7 @@ processCSDescriptor: doPopStackStuffAndCheckRIP: # Check if the RIP is canonical. - sra t7, t1, 47, flags=(EZF,), dataSize=ssz + srai t7, t1, 47, flags=(EZF,), dataSize=ssz # if t7 isn't 0 or -1, it wasn't canonical. br label("doPopStackStuff"), flags=(CEZF,) addi t0, t7, 1, flags=(EZF,), dataSize=ssz |