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authorGabe Black <gblack@eecs.umich.edu>2009-02-25 10:20:10 -0800
committerGabe Black <gblack@eecs.umich.edu>2009-02-25 10:20:10 -0800
commit8813168b5a3830b0b0a65b0342aca7b607e74b42 (patch)
treec749075f955713dbbfb3c4333a6aad5065964731 /src/arch/x86/isa/insts/general_purpose/data_conversion
parent28a35a6adbe083bbe7ff34dfe29d57a408f18bdb (diff)
downloadgem5-8813168b5a3830b0b0a65b0342aca7b607e74b42.tar.xz
X86: Do a merge for the zero extension microop.
Diffstat (limited to 'src/arch/x86/isa/insts/general_purpose/data_conversion')
-rw-r--r--src/arch/x86/isa/insts/general_purpose/data_conversion/translate.py2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/x86/isa/insts/general_purpose/data_conversion/translate.py b/src/arch/x86/isa/insts/general_purpose/data_conversion/translate.py
index d6ae7885a..c334693e5 100644
--- a/src/arch/x86/isa/insts/general_purpose/data_conversion/translate.py
+++ b/src/arch/x86/isa/insts/general_purpose/data_conversion/translate.py
@@ -55,7 +55,7 @@
microcode = '''
def macroop XLAT {
- zexti t1, rax, 7
+ zexti t1, rax, 7, dataSize=8
# Here, t1 can be used directly. The value of al is supposed to be treated
# as unsigned. Since we zero extended it from 8 bits above and the address
# size has to be at least 16 bits, t1 will not be sign extended.