X86: Put ldst into the microcode (the earlier changeset didn't really).

Also clean things up as much as possible so that faulting won't break an
instruction. More microops which verify addresses are needed.

--HG--
extra : convert_revision : 7c6050cb4798d287fe7d3cc4bb8c20dfa40ad2be

1 files changed, 24 insertions, 24 deletions

diff --git a/src/arch/x86/isa/insts/general_purpose/rotate_and_shift/rotate.py b/src/arch/x86/isa/insts/general_purpose/rotate_and_shift/rotate.py
index a13df3a64..b5ae9560e 100644
--- a/src/arch/x86/isa/insts/general_purpose/rotate_and_shift/rotate.py
+++ b/src/arch/x86/isa/insts/general_purpose/rotate_and_shift/rotate.py
@@ -61,7 +61,7 @@ def macroop ROL_R_I
 
 def macroop ROL_M_I
 {
-    ld t1, seg, sib, disp
+    ldst t1, seg, sib, disp
     roli t1, t1, imm
     st t1, seg, sib, disp
 };
@@ -69,7 +69,7 @@ def macroop ROL_M_I
 def macroop ROL_P_I
 {
     rdip t7
-    ld t1, seg, riprel, disp
+    ldst t1, seg, riprel, disp
     roli t1, t1, imm
     st t1, seg, riprel, disp
 };
@@ -81,7 +81,7 @@ def macroop ROL_1_R
 
 def macroop ROL_1_M
 {
-    ld t1, seg, sib, disp
+    ldst t1, seg, sib, disp
     roli t1, t1, 1
     st t1, seg, sib, disp
 };
@@ -89,7 +89,7 @@ def macroop ROL_1_M
 def macroop ROL_1_P
 {
     rdip t7
-    ld t1, seg, riprel, disp
+    ldst t1, seg, riprel, disp
     roli t1, t1, 1
     st t1, seg, riprel, disp
 };
@@ -101,7 +101,7 @@ def macroop ROL_R_R
 
 def macroop ROL_M_R
 {
-    ld t1, seg, sib, disp
+    ldst t1, seg, sib, disp
     rol t1, t1, reg
     st t1, seg, sib, disp
 };
@@ -109,7 +109,7 @@ def macroop ROL_M_R
 def macroop ROL_P_R
 {
     rdip t7
-    ld t1, seg, riprel, disp
+    ldst t1, seg, riprel, disp
     rol t1, t1, reg
     st t1, seg, riprel, disp
 };
@@ -121,7 +121,7 @@ def macroop ROR_R_I
 
 def macroop ROR_M_I
 {
-    ld t1, seg, sib, disp
+    ldst t1, seg, sib, disp
     rori t1, t1, imm
     st t1, seg, sib, disp
 };
@@ -129,7 +129,7 @@ def macroop ROR_M_I
 def macroop ROR_P_I
 {
     rdip t7
-    ld t1, seg, riprel, disp
+    ldst t1, seg, riprel, disp
     rori t1, t1, imm
     st t1, seg, riprel, disp
 };
@@ -141,7 +141,7 @@ def macroop ROR_1_R
 
 def macroop ROR_1_M
 {
-    ld t1, seg, sib, disp
+    ldst t1, seg, sib, disp
     rori t1, t1, 1
     st t1, seg, sib, disp
 };
@@ -149,7 +149,7 @@ def macroop ROR_1_M
 def macroop ROR_1_P
 {
     rdip t7
-    ld t1, seg, riprel, disp
+    ldst t1, seg, riprel, disp
     rori t1, t1, 1
     st t1, seg, riprel, disp
 };
@@ -161,7 +161,7 @@ def macroop ROR_R_R
 
 def macroop ROR_M_R
 {
-    ld t1, seg, sib, disp
+    ldst t1, seg, sib, disp
     ror t1, t1, reg
     st t1, seg, sib, disp
 };
@@ -169,7 +169,7 @@ def macroop ROR_M_R
 def macroop ROR_P_R
 {
     rdip t7
-    ld t1, seg, riprel, disp
+    ldst t1, seg, riprel, disp
     ror t1, t1, reg
     st t1, seg, riprel, disp
 };
@@ -181,7 +181,7 @@ def macroop RCL_R_I
 
 def macroop RCL_M_I
 {
-    ld t1, seg, sib, disp
+    ldst t1, seg, sib, disp
     rcli t1, t1, imm
     st t1, seg, sib, disp
 };
@@ -189,7 +189,7 @@ def macroop RCL_M_I
 def macroop RCL_P_I
 {
     rdip t7
-    ld t1, seg, riprel, disp
+    ldst t1, seg, riprel, disp
     rcli t1, t1, imm
     st t1, seg, riprel, disp
 };
@@ -201,7 +201,7 @@ def macroop RCL_1_R
 
 def macroop RCL_1_M
 {
-    ld t1, seg, sib, disp
+    ldst t1, seg, sib, disp
     rcli t1, t1, 1
     st t1, seg, sib, disp
 };
@@ -209,7 +209,7 @@ def macroop RCL_1_M
 def macroop RCL_1_P
 {
     rdip t7
-    ld t1, seg, riprel, disp
+    ldst t1, seg, riprel, disp
     rcli t1, t1, 1
     st t1, seg, riprel, disp
 };
@@ -221,7 +221,7 @@ def macroop RCL_R_R
 
 def macroop RCL_M_R
 {
-    ld t1, seg, sib, disp
+    ldst t1, seg, sib, disp
     rcl t1, t1, reg
     st t1, seg, sib, disp
 };
@@ -229,7 +229,7 @@ def macroop RCL_M_R
 def macroop RCL_P_R
 {
     rdip t7
-    ld t1, seg, riprel, disp
+    ldst t1, seg, riprel, disp
     rcl t1, t1, reg
     st t1, seg, riprel, disp
 };
@@ -241,7 +241,7 @@ def macroop RCR_R_I
 
 def macroop RCR_M_I
 {
-    ld t1, seg, sib, disp
+    ldst t1, seg, sib, disp
     rcri t1, t1, imm
     st t1, seg, sib, disp
 };
@@ -249,7 +249,7 @@ def macroop RCR_M_I
 def macroop RCR_P_I
 {
     rdip t7
-    ld t1, seg, riprel, disp
+    ldst t1, seg, riprel, disp
     rcri t1, t1, imm
     st t1, seg, riprel, disp
 };
@@ -261,7 +261,7 @@ def macroop RCR_1_R
 
 def macroop RCR_1_M
 {
-    ld t1, seg, sib, disp
+    ldst t1, seg, sib, disp
     rcri t1, t1, 1
     st t1, seg, sib, disp
 };
@@ -269,7 +269,7 @@ def macroop RCR_1_M
 def macroop RCR_1_P
 {
     rdip t7
-    ld t1, seg, riprel, disp
+    ldst t1, seg, riprel, disp
     rcri t1, t1, 1
     st t1, seg, riprel, disp
 };
@@ -281,7 +281,7 @@ def macroop RCR_R_R
 
 def macroop RCR_M_R
 {
-    ld t1, seg, sib, disp
+    ldst t1, seg, sib, disp
     rcr t1, t1, reg
     st t1, seg, sib, disp
 };
@@ -289,7 +289,7 @@ def macroop RCR_M_R
 def macroop RCR_P_R
 {
     rdip t7
-    ld t1, seg, riprel, disp
+    ldst t1, seg, riprel, disp
     rcr t1, t1, reg
     st t1, seg, riprel, disp
 };