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| author | Gabe Black <gblack@eecs.umich.edu> | 2007-10-02 22:19:53 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2007-10-02 22:19:53 -0700 |
| commit | 4049c9f76afd17c983eed923940eb7338229561d (patch) | |
| tree | 75cd2ddc8713126414e94de2ff99f1cbc6126b36 /src/arch/x86/isa/insts/general_purpose/semaphores.py | |
| parent | 7c521db9de281326f35a5743e1b4777a8e2bb2f4 (diff) | |
| download | gem5-4049c9f76afd17c983eed923940eb7338229561d.tar.xz | |
X86: Put ldst into the microcode (the earlier changeset didn't really).
Also clean things up as much as possible so that faulting won't break an
instruction. More microops which verify addresses are needed.
--HG--
extra : convert_revision : 7c6050cb4798d287fe7d3cc4bb8c20dfa40ad2be
Diffstat (limited to 'src/arch/x86/isa/insts/general_purpose/semaphores.py')
| -rw-r--r-- | src/arch/x86/isa/insts/general_purpose/semaphores.py | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/x86/isa/insts/general_purpose/semaphores.py b/src/arch/x86/isa/insts/general_purpose/semaphores.py index 800f1b325..27a31dbd9 100644 --- a/src/arch/x86/isa/insts/general_purpose/semaphores.py +++ b/src/arch/x86/isa/insts/general_purpose/semaphores.py @@ -61,7 +61,7 @@ def macroop CMPXCHG_R_R { }; def macroop CMPXCHG_M_R { - ld t1, seg, sib, disp + ldst t1, seg, sib, disp sub t0, rax, t1, flags=(OF, SF, ZF, AF, PF, CF) mov t1, t1, reg, flags=(CZF,) @@ -71,7 +71,7 @@ def macroop CMPXCHG_M_R { def macroop CMPXCHG_P_R { rdip t7 - ld t1, seg, riprel, disp + ldst t1, seg, riprel, disp sub t0, rax, t1, flags=(OF, SF, ZF, AF, PF, CF) mov t1, t1, reg, flags=(CZF,) |