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author | Steve Reinhardt <steve.reinhardt@amd.com> | 2016-02-06 17:21:18 -0800 |
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committer | Steve Reinhardt <steve.reinhardt@amd.com> | 2016-02-06 17:21:18 -0800 |
commit | dc8018a5c3482008232e6faaa2d96cf20aed7485 (patch) | |
tree | a972ac4544e227397595baf6eeb30e1854f480fc /src/arch/x86/isa/insts/general_purpose | |
parent | c8c82f09a282832d919f7eb073a47be838e65b29 (diff) | |
download | gem5-dc8018a5c3482008232e6faaa2d96cf20aed7485.tar.xz |
style: remove trailing whitespace
Result of running 'hg m5style --skip-all --fix-white -a'.
Diffstat (limited to 'src/arch/x86/isa/insts/general_purpose')
-rw-r--r-- | src/arch/x86/isa/insts/general_purpose/system_calls.py | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/x86/isa/insts/general_purpose/system_calls.py b/src/arch/x86/isa/insts/general_purpose/system_calls.py index d6f1a39bf..59519c0ae 100644 --- a/src/arch/x86/isa/insts/general_purpose/system_calls.py +++ b/src/arch/x86/isa/insts/general_purpose/system_calls.py @@ -43,7 +43,7 @@ def macroop SYSCALL_64 # Save the next RIP. rdip rcx - + # Stick rflags with RF masked into r11. rflags t2 limm t3, "~RFBit", dataSize=8 @@ -96,7 +96,7 @@ def macroop SYSCALL_COMPAT # Save the next RIP. rdip rcx - + # Stick rflags with RF masked into r11. rflags t2 limm t3, "~RFBit", dataSize=8 |