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| author | Steve Reinhardt <stever@eecs.umich.edu> | 2007-06-22 09:24:33 -0700 |
|---|---|---|
| committer | Steve Reinhardt <stever@eecs.umich.edu> | 2007-06-22 09:24:33 -0700 |
| commit | 4d1bcbcd36e5735e76b38abb151de716c31a2272 (patch) | |
| tree | 58c29ad6905c45332e1d1d12b9d66596ae6d30d4 /src/arch/x86/isa/insts/load_effective_address.py | |
| parent | bdd5fd20fb19eb52ef812cd284094e5513646e36 (diff) | |
| parent | 470a6a9a74eb28a5052e6492c0a3aa9724c57500 (diff) | |
| download | gem5-4d1bcbcd36e5735e76b38abb151de716c31a2272.tar.xz | |
Merge vm1.(none):/home/stever/bk/newmem-head
into vm1.(none):/home/stever/bk/newmem-cache2
--HG--
extra : convert_revision : 1da75335907fee2d1745ec13e515819dfe2aad89
Diffstat (limited to 'src/arch/x86/isa/insts/load_effective_address.py')
| -rw-r--r-- | src/arch/x86/isa/insts/load_effective_address.py | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/arch/x86/isa/insts/load_effective_address.py b/src/arch/x86/isa/insts/load_effective_address.py index f5f92ddbf..dcaf9778e 100644 --- a/src/arch/x86/isa/insts/load_effective_address.py +++ b/src/arch/x86/isa/insts/load_effective_address.py @@ -55,11 +55,11 @@ microcode = ''' def macroop LEA_R_M { - lea "env.reg", 3, ["env.scale", "env.index", "env.base"], "DISPLACEMENT" + lea reg, ds, [scale, index, base], disp }; def macroop LEA_R_P { - rdip "NUM_INTREGS+7" - lea "env.reg", 3, ["env.scale", "env.index", "env.base"], "DISPLACEMENT" + rdip t7 + lea reg, ds, [scale, index, base], disp }; ''' |