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author | Gabe Black <gblack@eecs.umich.edu> | 2007-08-04 20:12:54 -0700 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2007-08-04 20:12:54 -0700 |
commit | e410a925df8d37f386c97dc7cdd9a78347ce4700 (patch) | |
tree | b4102987453b1303051dfeea61aa1a45c2e5e75f /src/arch/x86/isa/insts/logical.py | |
parent | ced6cbcccf4540358093f060dad4d59ad6557d6a (diff) | |
download | gem5-e410a925df8d37f386c97dc7cdd9a78347ce4700.tar.xz |
X86: Start implementing segmentation support.
Make instructions observe segment prefixes, default segment rules, segment
base addresses.
Also fix some microcode and add sib and riprel "keywords" to the x86
specialization of the microassembler.
--HG--
extra : convert_revision : be5a3b33d33f243ed6e1ad63faea8495e46d0ac9
Diffstat (limited to 'src/arch/x86/isa/insts/logical.py')
-rw-r--r-- | src/arch/x86/isa/insts/logical.py | 68 |
1 files changed, 34 insertions, 34 deletions
diff --git a/src/arch/x86/isa/insts/logical.py b/src/arch/x86/isa/insts/logical.py index b30f31421..2137ae82f 100644 --- a/src/arch/x86/isa/insts/logical.py +++ b/src/arch/x86/isa/insts/logical.py @@ -62,45 +62,45 @@ def macroop OR_R_R def macroop OR_M_I { limm t2, imm - ld t1, ds, [scale, index, base], disp + ld t1, seg, sib, disp or t1, t1, t2, flags=(OF,SF,ZF,PF,CF) - st t1, ds, [scale, index, base], disp + st t1, seg, sib, disp }; def macroop OR_P_I { limm t2, imm rdip t7 - ld t1, ds, [0, t0, t7], disp + ld t1, seg, riprel, disp or t1, t1, t2, flags=(OF,SF,ZF,PF,CF) - st t1, ds, [0, t0, t7], disp + st t1, seg, riprel, disp }; def macroop OR_M_R { - ld t1, ds, [scale, index, base], disp + ld t1, seg, sib, disp or t1, t1, reg, flags=(OF,SF,ZF,PF,CF) - st t1, ds, [scale, index, base], disp + st t1, seg, sib, disp }; def macroop OR_P_R { rdip t7 - ld t1, ds, [0, t0, t7], disp + ld t1, seg, riprel, disp or t1, t1, reg, flags=(OF,SF,ZF,PF,CF) - st t1, ds, [0, t0, t7], disp + st t1, seg, riprel, disp }; def macroop OR_R_M { - ld t1, ds, [scale, index, base], disp + ld t1, seg, sib, disp or reg, reg, t1, flags=(OF,SF,ZF,PF,CF) }; def macroop OR_R_P { rdip t7 - ld t1, ds, [0, t0, t7], disp + ld t1, seg, riprel, disp or reg, reg, t1, flags=(OF,SF,ZF,PF,CF) }; @@ -124,45 +124,45 @@ def macroop XOR_R_I def macroop XOR_M_I { limm t2, imm - ld t1, ds, [scale, index, base], disp + ld t1, seg, sib, disp xor t1, t1, t2, flags=(OF,SF,ZF,PF,CF) - st t1, ds, [scale, index, base], disp + st t1, seg, sib, disp }; def macroop XOR_P_I { limm t2, imm rdip t7 - ld t1, ds, [1, t0, t7], disp + ld t1, seg, riprel, disp xor t1, t1, t2, flags=(OF,SF,ZF,PF,CF) - st t1, ds, [1, t0, t7], disp + st t1, seg, riprel, disp }; def macroop XOR_M_R { - ld t1, ds, [scale, index, base], disp + ld t1, seg, sib, disp xor t1, t1, reg, flags=(OF,SF,ZF,PF,CF) - st t1, ds, [scale, index, base], disp + st t1, seg, sib, disp }; def macroop XOR_P_R { rdip t7 - ld t1, ds, [1, t0, t7], disp + ld t1, seg, riprel, disp xor t1, t1, reg, flags=(OF,SF,ZF,PF,CF) - st t1, ds, [scale, index, base], disp + st t1, seg, riprel, disp }; def macroop XOR_R_M { - ld t1, ds, [scale, index, base], disp + ld t1, seg, sib, disp xor reg, reg, t1, flags=(OF,SF,ZF,PF,CF) }; def macroop XOR_R_P { rdip t7 - ld t1, ds, [1, t0, t7], disp + ld t1, seg, riprel, disp xor reg, reg, t1, flags=(OF,SF,ZF,PF,CF) }; @@ -173,14 +173,14 @@ def macroop AND_R_R def macroop AND_R_M { - ld t1, ds, [scale, index, base], disp + ld t1, seg, sib, disp and reg, reg, t1, flags=(OF,SF,ZF,PF,CF) }; def macroop AND_R_P { rdip t7 - ld t1, ds, [1, t0, t7], disp + ld t1, seg, riprel, disp and reg, reg, t1, flags=(OF,SF,ZF,PF,CF) }; @@ -192,34 +192,34 @@ def macroop AND_R_I def macroop AND_M_I { - ld t2, ds, [scale, index, base], disp + ld t2, seg, sib, disp limm t1, imm and t2, t2, t1, flags=(OF,SF,ZF,PF,CF) - st t2, ds, [scale, index, base], disp + st t2, seg, sib, disp }; def macroop AND_P_I { rdip t7 - ld t2, ds, [0, t0, t7], disp + ld t2, seg, riprel, disp limm t1, imm and t2, t2, t1, flags=(OF,SF,ZF,PF,CF) - st t2, ds, [0, t0, t7], disp + st t2, seg, riprel, disp }; def macroop AND_M_R { - ld t1, ds, [scale, index, base], disp + ld t1, seg, sib, disp and t1, t1, reg, flags=(OF,SF,ZF,PF,CF) - st t1, ds, [scale, index, base], disp + st t1, seg, sib, disp }; def macroop AND_P_R { rdip t7 - ld t1, ds, [0, t0, t7], disp + ld t1, seg, riprel, disp and t1, t1, reg, flags=(OF,SF,ZF,PF,CF) - st t1, ds, [0, t0, t7], disp + st t1, seg, riprel, disp }; def macroop NOT_R @@ -231,17 +231,17 @@ def macroop NOT_R def macroop NOT_M { limm t1, -1 - ld t2, ds, [scale, index, base], disp + ld t2, seg, sib, disp xor t2, t2, t1 - st t2, ds, [scale, index, base], disp + st t2, seg, sib, disp }; def macroop NOT_P { limm t1, -1 rdip t7 - ld t2, ds, [0, t0, t7], disp + ld t2, seg, riprel, disp xor t2, t2, t1 - st t2, ds, [0, t0, t7], disp + st t2, seg, riprel, disp }; ''' |