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author | Gabe Black <gblack@eecs.umich.edu> | 2009-04-19 03:47:59 -0700 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2009-04-19 03:47:59 -0700 |
commit | 3eed59768c39c6faeb1be0f3bc0bb283656c1f90 (patch) | |
tree | c0e9204f5264720a0e82d0863ee188be071c8a90 /src/arch/x86/isa/insts/romutil.py | |
parent | 8761057c7884103a8614ae174fa7e63c9291ba3d (diff) | |
download | gem5-3eed59768c39c6faeb1be0f3bc0bb283656c1f90.tar.xz |
X86: Explicitly use the right width in a few places that need a 64 bit value.
Diffstat (limited to 'src/arch/x86/isa/insts/romutil.py')
-rw-r--r-- | src/arch/x86/isa/insts/romutil.py | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/x86/isa/insts/romutil.py b/src/arch/x86/isa/insts/romutil.py index aa013dbd1..2fcc56e8a 100644 --- a/src/arch/x86/isa/insts/romutil.py +++ b/src/arch/x86/isa/insts/romutil.py @@ -164,8 +164,8 @@ def rom # The type field of the original gate starts at bit 40. # Set the TF, NT, and RF bits. We'll flip them at the end. - limm t6, (1 << 8) | (1 << 14) | (1 << 16) - or t10, t10, t6 + limm t6, (1 << 8) | (1 << 14) | (1 << 16), dataSize=8 + or t10, t10, t6, dataSize=8 srli t5, t4, 40, dataSize=8 srli t7, t10, 9, dataSize=8 xor t5, t7, t5, dataSize=8 |