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| author | Gabe Black <gblack@eecs.umich.edu> | 2009-04-19 03:36:57 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2009-04-19 03:36:57 -0700 |
| commit | f2ff5b92498fef9e7a3730ce1cc8df33c28c0d2d (patch) | |
| tree | 94b3904071535a055503cbd75ea522ac477bac91 /src/arch/x86/isa/insts/romutil.py | |
| parent | 35eea4191bdd2644112641091aaa21ec6d5defef (diff) | |
| download | gem5-f2ff5b92498fef9e7a3730ce1cc8df33c28c0d2d.tar.xz | |
X86: Make the interrupt entering microcode record the value to use, not actually use it.
Diffstat (limited to 'src/arch/x86/isa/insts/romutil.py')
| -rw-r--r-- | src/arch/x86/isa/insts/romutil.py | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/x86/isa/insts/romutil.py b/src/arch/x86/isa/insts/romutil.py index 17034fd49..aa013dbd1 100644 --- a/src/arch/x86/isa/insts/romutil.py +++ b/src/arch/x86/isa/insts/romutil.py @@ -84,7 +84,7 @@ def rom sub t0, t5, t10, flags=(EZF,), dataSize=8 # We're going to change priviledge, so zero out the stack selector. We # need to let the IST have priority so we don't branch yet. - wrsel t11, t0, flags=(nCEZF,) + mov t11, t0, t0, flags=(nCEZF,) # Check the IST field of the gate descriptor srli t12, t4, 32, dataSize=8 |