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| author | Gabe Black <gblack@eecs.umich.edu> | 2007-08-04 20:12:54 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2007-08-04 20:12:54 -0700 |
| commit | e410a925df8d37f386c97dc7cdd9a78347ce4700 (patch) | |
| tree | b4102987453b1303051dfeea61aa1a45c2e5e75f /src/arch/x86/isa/insts/rotate_and_shift/shift.py | |
| parent | ced6cbcccf4540358093f060dad4d59ad6557d6a (diff) | |
| download | gem5-e410a925df8d37f386c97dc7cdd9a78347ce4700.tar.xz | |
X86: Start implementing segmentation support.
Make instructions observe segment prefixes, default segment rules, segment
base addresses.
Also fix some microcode and add sib and riprel "keywords" to the x86
specialization of the microassembler.
--HG--
extra : convert_revision : be5a3b33d33f243ed6e1ad63faea8495e46d0ac9
Diffstat (limited to 'src/arch/x86/isa/insts/rotate_and_shift/shift.py')
| -rw-r--r-- | src/arch/x86/isa/insts/rotate_and_shift/shift.py | 72 |
1 files changed, 36 insertions, 36 deletions
diff --git a/src/arch/x86/isa/insts/rotate_and_shift/shift.py b/src/arch/x86/isa/insts/rotate_and_shift/shift.py index 64eab3edc..45758b489 100644 --- a/src/arch/x86/isa/insts/rotate_and_shift/shift.py +++ b/src/arch/x86/isa/insts/rotate_and_shift/shift.py @@ -61,17 +61,17 @@ def macroop SAL_R_I def macroop SAL_M_I { - ld t1, ds, [scale, index, base], disp + ld t1, seg, sib, disp slli t1, t1, imm - st t1, ds, [scale, index, base], disp + st t1, seg, sib, disp }; def macroop SAL_P_I { rdip t7 - ld t1, ds, [0, t0, t7], disp + ld t1, seg, riprel, disp slli t1, t1, imm - st t1, ds, [0, t0, t7], disp + st t1, seg, riprel, disp }; def macroop SAL_1_R @@ -81,17 +81,17 @@ def macroop SAL_1_R def macroop SAL_1_M { - ld t1, ds, [scale, index, base], disp + ld t1, seg, sib, disp slli t1, t1, 1 - st t1, ds, [scale, index, base], disp + st t1, seg, sib, disp }; def macroop SAL_1_P { rdip t7 - ld t1, ds, [0, t0, t7], disp + ld t1, seg, riprel, disp slli t1, t1, 1 - st t1, ds, [0, t0, t7], disp + st t1, seg, riprel, disp }; def macroop SAL_R_R @@ -101,17 +101,17 @@ def macroop SAL_R_R def macroop SAL_M_R { - ld t1, ds, [scale, index, base], disp + ld t1, seg, sib, disp sll t1, t1, reg - st t1, ds, [scale, index, base], disp + st t1, seg, sib, disp }; def macroop SAL_P_R { rdip t7 - ld t1, ds, [0, t0, t7], disp + ld t1, seg, riprel, disp sll t1, t1, reg - st t1, ds, [0, t0, t7], disp + st t1, seg, riprel, disp }; def macroop SHR_R_I @@ -121,17 +121,17 @@ def macroop SHR_R_I def macroop SHR_M_I { - ld t1, ds, [scale, index, base], disp + ld t1, seg, sib, disp srli t1, t1, imm - st t1, ds, [scale, index, base], disp + st t1, seg, sib, disp }; def macroop SHR_P_I { rdip t7 - ld t1, ds, [0, t0, t7], disp + ld t1, seg, riprel, disp srli t1, t1, imm - st t1, ds, [0, t0, t7], disp + st t1, seg, riprel, disp }; def macroop SHR_1_R @@ -141,17 +141,17 @@ def macroop SHR_1_R def macroop SHR_1_M { - ld t1, ds, [scale, index, base], disp + ld t1, seg, sib, disp srli t1, t1, 1 - st t1, ds, [scale, index, base], disp + st t1, seg, sib, disp }; def macroop SHR_1_P { rdip t7 - ld t1, ds, [0, t0, t7], disp + ld t1, seg, riprel, disp srli t1, t1, 1 - st t1, ds, [0, t0, t7], disp + st t1, seg, riprel, disp }; def macroop SHR_R_R @@ -161,17 +161,17 @@ def macroop SHR_R_R def macroop SHR_M_R { - ld t1, ds, [scale, index, base], disp + ld t1, seg, sib, disp srl t1, t1, reg - st t1, ds, [scale, index, base], disp + st t1, seg, sib, disp }; def macroop SHR_P_R { rdip t7 - ld t1, ds, [0, t0, t7], disp + ld t1, seg, riprel, disp srl t1, t1, reg - st t1, ds, [0, t0, t7], disp + st t1, seg, riprel, disp }; def macroop SAR_R_I @@ -181,17 +181,17 @@ def macroop SAR_R_I def macroop SAR_M_I { - ld t1, ds, [scale, index, base], disp + ld t1, seg, sib, disp srai t1, t1, imm - st t1, ds, [scale, index, base], disp + st t1, seg, sib, disp }; def macroop SAR_P_I { rdip t7 - ld t1, ds, [0, t0, t7], disp + ld t1, seg, riprel, disp srai t1, t1, imm - st t1, ds, [0, t0, t7], disp + st t1, seg, riprel, disp }; def macroop SAR_1_R @@ -201,17 +201,17 @@ def macroop SAR_1_R def macroop SAR_1_M { - ld t1, ds, [scale, index, base], disp + ld t1, seg, sib, disp srai t1, t1, 1 - st t1, ds, [scale, index, base], disp + st t1, seg, sib, disp }; def macroop SAR_1_P { rdip t7 - ld t1, ds, [0, t0, t7], disp + ld t1, seg, riprel, disp srai t1, t1, 1 - st t1, ds, [0, t0, t7], disp + st t1, seg, riprel, disp }; def macroop SAR_R_R @@ -221,16 +221,16 @@ def macroop SAR_R_R def macroop SAR_M_R { - ld t1, ds, [scale, index, base], disp + ld t1, seg, sib, disp sra t1, t1, reg - st t1, ds, [scale, index, base], disp + st t1, seg, sib, disp }; def macroop SAR_P_R { rdip t7 - ld t1, ds, [0, t0, t7], disp + ld t1, seg, riprel, disp sra t1, t1, reg - st t1, ds, [0, t0, t7], disp + st t1, seg, riprel, disp }; ''' |