X86: Put ldst into the microcode (the earlier changeset didn't really).

Also clean things up as much as possible so that faulting won't break an
instruction. More microops which verify addresses are needed.

--HG--
extra : convert_revision : 7c6050cb4798d287fe7d3cc4bb8c20dfa40ad2be

1 files changed, 5 insertions, 0 deletions

diff --git a/src/arch/x86/isa/insts/simd128/floating_point/data_transfer/move.py b/src/arch/x86/isa/insts/simd128/floating_point/data_transfer/move.py
index de89005f2..ee85a038a 100644
--- a/src/arch/x86/isa/insts/simd128/floating_point/data_transfer/move.py
+++ b/src/arch/x86/isa/insts/simd128/floating_point/data_transfer/move.py
@@ -55,28 +55,33 @@
 
 microcode = '''
 def macroop MOVAPS_R_M {
+    # Check low address.
     ldfp xmmh, seg, sib, "DISPLACEMENT + 8", dataSize=8
     ldfp xmml, seg, sib, disp, dataSize=8
 };
 
 def macroop MOVAPS_R_P {
     rdip t7
+    # Check low address.
     ldfp xmmh, seg, riprel, "DISPLACEMENT + 8", dataSize=8
     ldfp xmml, seg, riprel, disp, dataSize=8
 };
 
 def macroop MOVAPS_M_R {
+    # Check low address.
     stfp xmmh, seg, sib, "DISPLACEMENT + 8", dataSize=8
     stfp xmml, seg, sib, disp, dataSize=8
 };
 
 def macroop MOVAPS_P_R {
     rdip t7
+    # Check low address.
     stfp xmmh, seg, riprel, "DISPLACEMENT + 8", dataSize=8
     stfp xmml, seg, riprel, disp, dataSize=8
 };
 
 def macroop MOVAPS_R_R {
+    # Check low address.
     movfp xmml, xmml, xmmlm, dataSize=8
     movfp xmmh, xmmh, xmmhm, dataSize=8
 };