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| author | Gabe Black <gblack@eecs.umich.edu> | 2009-12-19 01:48:31 -0800 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2009-12-19 01:48:31 -0800 |
| commit | c7ca1d3c8a3b785c80ec23bd84666c3c6e08b4e4 (patch) | |
| tree | 46c2eddae0dd6ccb43fafd81fce33f2a84208303 /src/arch/x86/isa/insts/simd128/integer/arithmetic/multiply_add.py | |
| parent | 25545115336e961a570bafdb8c2934db0015dece (diff) | |
| download | gem5-c7ca1d3c8a3b785c80ec23bd84666c3c6e08b4e4.tar.xz | |
X86: Add a common named flag for signed media operations.
Diffstat (limited to 'src/arch/x86/isa/insts/simd128/integer/arithmetic/multiply_add.py')
| -rw-r--r-- | src/arch/x86/isa/insts/simd128/integer/arithmetic/multiply_add.py | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/src/arch/x86/isa/insts/simd128/integer/arithmetic/multiply_add.py b/src/arch/x86/isa/insts/simd128/integer/arithmetic/multiply_add.py index f157d165f..64ae05190 100644 --- a/src/arch/x86/isa/insts/simd128/integer/arithmetic/multiply_add.py +++ b/src/arch/x86/isa/insts/simd128/integer/arithmetic/multiply_add.py @@ -55,22 +55,22 @@ microcode = ''' def macroop PMADDWD_XMM_XMM { - mmuli ufp3, xmml, xmmlm, srcSize=2, destSize=4, ext=(0x2 | 0x10 | 0x20) - mmuli ufp4, xmml, xmmlm, srcSize=2, destSize=4, ext=(0x2 | 0x10) + mmuli ufp3, xmml, xmmlm, srcSize=2, destSize=4, ext = Signed + "| 0x10 | 0x20" + mmuli ufp4, xmml, xmmlm, srcSize=2, destSize=4, ext = Signed + "| 0x10" maddi xmml, ufp3, ufp4, size=4, ext=0 - mmuli ufp3, xmmh, xmmhm, srcSize=2, destSize=4, ext=(0x2 | 0x10 | 0x20) - mmuli ufp4, xmmh, xmmhm, srcSize=2, destSize=4, ext=(0x2 | 0x10) + mmuli ufp3, xmmh, xmmhm, srcSize=2, destSize=4, ext = Signed + "| 0x10 | 0x20" + mmuli ufp4, xmmh, xmmhm, srcSize=2, destSize=4, ext = Signed + "| 0x10" maddi xmmh, ufp3, ufp4, size=4, ext=0 }; def macroop PMADDWD_XMM_M { ldfp ufp1, seg, sib, "DISPLACEMENT", dataSize=8 ldfp ufp2, seg, sib, "DISPLACEMENT + 8", dataSize=8 - mmuli ufp3, xmml, ufp1, srcSize=2, destSize=4, ext=(0x2 | 0x10 | 0x20) - mmuli ufp4, xmml, ufp1, srcSize=2, destSize=4, ext=(0x2 | 0x10) + mmuli ufp3, xmml, ufp1, srcSize=2, destSize=4, ext = Signed + "| 0x10 | 0x20" + mmuli ufp4, xmml, ufp1, srcSize=2, destSize=4, ext = Signed + "| 0x10" maddi xmml, ufp3, ufp4, size=4, ext=0 - mmuli ufp3, xmmh, ufp2, srcSize=2, destSize=4, ext=(0x2 | 0x10 | 0x20) - mmuli ufp4, xmmh, ufp2, srcSize=2, destSize=4, ext=(0x2 | 0x10) + mmuli ufp3, xmmh, ufp2, srcSize=2, destSize=4, ext = Signed + "| 0x10 | 0x20" + mmuli ufp4, xmmh, ufp2, srcSize=2, destSize=4, ext = Signed + "| 0x10" maddi xmmh, ufp3, ufp4, size=4, ext=0 }; @@ -78,11 +78,11 @@ def macroop PMADDWD_XMM_P { rdip t7 ldfp ufp1, seg, riprel, "DISPLACEMENT", dataSize=8 ldfp ufp2, seg, riprel, "DISPLACEMENT + 8", dataSize=8 - mmuli ufp3, xmml, ufp1, srcSize=2, destSize=4, ext=(0x2 | 0x10 | 0x20) - mmuli ufp4, xmml, ufp1, srcSize=2, destSize=4, ext=(0x2 | 0x10) + mmuli ufp3, xmml, ufp1, srcSize=2, destSize=4, ext = Signed + "| 0x10 | 0x20" + mmuli ufp4, xmml, ufp1, srcSize=2, destSize=4, ext = Signed + "| 0x10" maddi xmml, ufp3, ufp4, size=4, ext=0 - mmuli ufp3, xmmh, ufp2, srcSize=2, destSize=4, ext=(0x2 | 0x10 | 0x20) - mmuli ufp4, xmmh, ufp2, srcSize=2, destSize=4, ext=(0x2 | 0x10) + mmuli ufp3, xmmh, ufp2, srcSize=2, destSize=4, ext = Signed + "| 0x10 | 0x20" + mmuli ufp4, xmmh, ufp2, srcSize=2, destSize=4, ext = Signed + "| 0x10" maddi xmmh, ufp3, ufp4, size=4, ext=0 }; ''' |