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authorGabe Black <gblack@eecs.umich.edu>2007-10-02 22:19:53 -0700
committerGabe Black <gblack@eecs.umich.edu>2007-10-02 22:19:53 -0700
commit4049c9f76afd17c983eed923940eb7338229561d (patch)
tree75cd2ddc8713126414e94de2ff99f1cbc6126b36 /src/arch/x86/isa/insts/simd128
parent7c521db9de281326f35a5743e1b4777a8e2bb2f4 (diff)
downloadgem5-4049c9f76afd17c983eed923940eb7338229561d.tar.xz
X86: Put ldst into the microcode (the earlier changeset didn't really).
Also clean things up as much as possible so that faulting won't break an instruction. More microops which verify addresses are needed. --HG-- extra : convert_revision : 7c6050cb4798d287fe7d3cc4bb8c20dfa40ad2be
Diffstat (limited to 'src/arch/x86/isa/insts/simd128')
-rw-r--r--src/arch/x86/isa/insts/simd128/floating_point/data_transfer/move.py5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/arch/x86/isa/insts/simd128/floating_point/data_transfer/move.py b/src/arch/x86/isa/insts/simd128/floating_point/data_transfer/move.py
index de89005f2..ee85a038a 100644
--- a/src/arch/x86/isa/insts/simd128/floating_point/data_transfer/move.py
+++ b/src/arch/x86/isa/insts/simd128/floating_point/data_transfer/move.py
@@ -55,28 +55,33 @@
microcode = '''
def macroop MOVAPS_R_M {
+ # Check low address.
ldfp xmmh, seg, sib, "DISPLACEMENT + 8", dataSize=8
ldfp xmml, seg, sib, disp, dataSize=8
};
def macroop MOVAPS_R_P {
rdip t7
+ # Check low address.
ldfp xmmh, seg, riprel, "DISPLACEMENT + 8", dataSize=8
ldfp xmml, seg, riprel, disp, dataSize=8
};
def macroop MOVAPS_M_R {
+ # Check low address.
stfp xmmh, seg, sib, "DISPLACEMENT + 8", dataSize=8
stfp xmml, seg, sib, disp, dataSize=8
};
def macroop MOVAPS_P_R {
rdip t7
+ # Check low address.
stfp xmmh, seg, riprel, "DISPLACEMENT + 8", dataSize=8
stfp xmml, seg, riprel, disp, dataSize=8
};
def macroop MOVAPS_R_R {
+ # Check low address.
movfp xmml, xmml, xmmlm, dataSize=8
movfp xmmh, xmmh, xmmhm, dataSize=8
};