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| author | Pouya Fotouhi <Pouya.Fotouhi@amd.com> | 2019-08-20 19:54:29 -0500 |
|---|---|---|
| committer | Pouya Fotouhi <pfotouhi@ucdavis.edu> | 2019-09-05 05:48:08 +0000 |
| commit | 8d439c29ed86f55c454396fdd03d606cfa13a95a (patch) | |
| tree | 3ce2a08873a3388f3acdb1bac86d8eb117642497 /src/arch/x86/isa/insts/simd64/integer/data_transfer | |
| parent | 3edfacea9c30b0f1c38c3296e7e4110251a247a5 (diff) | |
| download | gem5-8d439c29ed86f55c454396fdd03d606cfa13a95a.tar.xz | |
arch-x86: implement movntq/movntdq instructions
Non-temporal quadword/double-quadword move instructions.
This change ignores the non-temporal hint and instructions are
implemented to send cacheable request to memory.
This would have some "performance" impact (i.e. having some cache
pollution) to get better "correctness" in behavior.
Change-Id: I2052ac0970f61a54bafb7332762debcb7103202d
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20288
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Diffstat (limited to 'src/arch/x86/isa/insts/simd64/integer/data_transfer')
| -rw-r--r-- | src/arch/x86/isa/insts/simd64/integer/data_transfer/move_non_temporal.py | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/src/arch/x86/isa/insts/simd64/integer/data_transfer/move_non_temporal.py b/src/arch/x86/isa/insts/simd64/integer/data_transfer/move_non_temporal.py index f068a0693..ccd37f165 100644 --- a/src/arch/x86/isa/insts/simd64/integer/data_transfer/move_non_temporal.py +++ b/src/arch/x86/isa/insts/simd64/integer/data_transfer/move_non_temporal.py @@ -34,9 +34,19 @@ # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. # # Authors: Gabe Black +# Pouya Fotouhi microcode = ''' -# MOVNTQ +def macroop MOVNTQ_M_MMX { + warn "MOVNTQ: Ignoring non-temporal hint, modeling as cacheable!" + stfp mmx, seg, sib, "DISPLACEMENT", dataSize=8 +}; + +def macroop MOVNTQ_P_MMX { + warn "MOVNTQ_P: Ignoring non-temporal hint, modeling as cacheable!" + rdip t7 + stfp mmx, seg, riprel, "DISPLACEMENT", dataSize=8 +}; def macroop MASKMOVQ_MMX_MMX { ldfp ufp1, ds, [1, t0, rdi], dataSize=8 |