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| author | Gabe Black <gblack@eecs.umich.edu> | 2009-04-19 04:56:45 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2009-04-19 04:56:45 -0700 |
| commit | 209cfc89fdf7dc8775c2b1d0870d6610bae5ed21 (patch) | |
| tree | bd134aadeb890c14de2471fd1ca43968596e478e /src/arch/x86/isa/insts | |
| parent | e475cf85f0ff50b3e997a00bc0af822c86b9d826 (diff) | |
| download | gem5-209cfc89fdf7dc8775c2b1d0870d6610bae5ed21.tar.xz | |
X86: Implement a locking version of BTC.
Diffstat (limited to 'src/arch/x86/isa/insts')
| -rw-r--r-- | src/arch/x86/isa/insts/general_purpose/compare_and_test/bit_test.py | 46 |
1 files changed, 46 insertions, 0 deletions
diff --git a/src/arch/x86/isa/insts/general_purpose/compare_and_test/bit_test.py b/src/arch/x86/isa/insts/general_purpose/compare_and_test/bit_test.py index 4dca52010..dd25b8078 100644 --- a/src/arch/x86/isa/insts/general_purpose/compare_and_test/bit_test.py +++ b/src/arch/x86/isa/insts/general_purpose/compare_and_test/bit_test.py @@ -154,6 +154,27 @@ def macroop BTC_P_I { st t1, seg, riprel, disp }; +def macroop BTC_LOCKED_M_I { + limm t1, imm, dataSize=asz + limm t4, 1 + roli t4, t4, imm + ldstl t1, seg, sib, disp + sexti t0, t1, imm, flags=(CF,) + xor t1, t1, t4 + stul t1, seg, sib, disp +}; + +def macroop BTC_LOCKED_P_I { + rdip t7, dataSize=asz + limm t1, imm, dataSize=asz + limm t4, 1 + roli t4, t4, imm + ldstl t1, seg, riprel, disp + sexti t0, t1, imm, flags=(CF,) + xor t1, t1, t4 + stul t1, seg, riprel, disp +}; + def macroop BTC_R_R { sext t0, reg, regm, flags=(CF,) limm t1, 1 @@ -186,6 +207,31 @@ def macroop BTC_P_R { st t1, seg, [1, t2, t7], disp }; +def macroop BTC_LOCKED_M_R { + srai t2, reg, 3, dataSize=asz + srai t3, t2, ldsz, dataSize=asz + lea t3, flatseg, [dsz, t3, base], dataSize=asz + limm t4, 1 + rol t4, t4, reg + ldstl t1, seg, [scale, index, t3], disp + sext t0, t1, reg, flags=(CF,) + xor t1, t1, t4 + stul t1, seg, [scale, index, t3], disp +}; + +def macroop BTC_LOCKED_P_R { + rdip t7, dataSize=asz + srai t2, reg, 3, dataSize=asz + srai t3, t2, ldsz, dataSize=asz + lea t3, flatseg, [dsz, t3, base], dataSize=asz + limm t4, 1 + rol t4, t4, reg + ldstl t1, seg, [1, t2, t7], disp + sext t0, t1, reg, flags=(CF,) + xor t1, t1, t4 + stul t1, seg, [1, t2, t7], disp +}; + def macroop BTR_R_I { sexti t0, reg, imm, flags=(CF,) limm t1, "(uint64_t(-(2ULL)))" |