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authorGabe Black <gblack@eecs.umich.edu>2007-07-30 13:29:33 -0700
committerGabe Black <gblack@eecs.umich.edu>2007-07-30 13:29:33 -0700
commit18be07289f8cfc733097c2f759676fbcacd7db1e (patch)
tree6faefe284ace32c7d323ab5057321c4ccae7b32c /src/arch/x86/isa/insts
parentdbc979b9e283e39562c425f97d15802bdb958452 (diff)
downloadgem5-18be07289f8cfc733097c2f759676fbcacd7db1e.tar.xz
X86: Implement a stub CPUID function which is hardcode to return certain values.
--HG-- extra : convert_revision : 4085e04fd13e834646106faa55726d07d9631f42
Diffstat (limited to 'src/arch/x86/isa/insts')
-rw-r--r--src/arch/x86/isa/insts/processor_information.py15
1 files changed, 14 insertions, 1 deletions
diff --git a/src/arch/x86/isa/insts/processor_information.py b/src/arch/x86/isa/insts/processor_information.py
index b9c8a407e..f7ef4db98 100644
--- a/src/arch/x86/isa/insts/processor_information.py
+++ b/src/arch/x86/isa/insts/processor_information.py
@@ -53,7 +53,20 @@
#
# Authors: Gabe Black
-microcode = ""
+microcode = '''
+def macroop CPUID_R {
+ #
+ # For now, the CPUID function number will be hard wired to 0x8000_0000.
+ # Getting it to work more robustly will likely require microcode branching
+ # which probably doesn't work at the moment.
+ #
+
+ limm rax, 0x80000018, dataSize=4
+ limm rbx, 0x68747541, dataSize=4
+ limm rdx, 0x69746e65, dataSize=4
+ limm rcx, 0x444d4163, dataSize=4
+};
+'''
#let {{
# class CPUID(Inst):
# "GenFault ${new UnimpInstFault}"