X86: Implement idiv and propogate the mul corner case fix.

--HG--
extra : convert_revision : 348aa081067728afa14dc5b609fc7e26dbc5fad5

1 files changed, 30 insertions, 2 deletions

diff --git a/src/arch/x86/isa/insts/arithmetic/multiply_and_divide.py b/src/arch/x86/isa/insts/arithmetic/multiply_and_divide.py
index c28b2567c..f498a10e0 100644
--- a/src/arch/x86/isa/insts/arithmetic/multiply_and_divide.py
+++ b/src/arch/x86/isa/insts/arithmetic/multiply_and_divide.py
@@ -134,8 +134,9 @@ def macroop IMUL_B_P
 
 def macroop IMUL_R
 {
-    muleh rdx, rax, reg
+    muleh t1, rax, reg
     mulel rax, rax, reg
+    mov rdx, rdx, t1
 };
 
 def macroop IMUL_M
@@ -229,8 +230,9 @@ def macroop DIV_B_P
 
 def macroop DIV_R
 {
-    divr rdx, rax, reg
+    divr t1, rax, reg
     divq rax, rax, reg
+    mov rdx, rdx, t1
 };
 
 def macroop DIV_M
@@ -247,6 +249,32 @@ def macroop DIV_P
     divr rdx, rax, t1
     divq rax, rax, t1
 };
+
+#
+# Signed division
+#
+
+def macroop IDIV_R
+{
+    divr t1, rax, reg
+    divq rax, rax, reg
+    mov rdx, rdx, t1
+};
+
+def macroop IDIV_M
+{
+    ld t1, seg, sib, disp
+    divr rdx, rax, t1
+    divq rax, rax, t1
+};
+
+def macroop IDIV_P
+{
+    rdip t7
+    ld t1, seg, riprel, disp
+    divr rdx, rax, t1
+    divq rax, rax, t1
+};
 '''
 #let {{
 #    class IDIV(Inst):