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author | Gabe Black <gblack@eecs.umich.edu> | 2007-09-06 16:27:28 -0700 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2007-09-06 16:27:28 -0700 |
commit | e4c01713562f51847537c5724bc629ce4bdcf3bc (patch) | |
tree | e2e30437879036e4fa10e2720112f12cefcfd310 /src/arch/x86/isa/insts | |
parent | 7f079149f147107070f518fc0a86c45c6c62b2a5 (diff) | |
download | gem5-e4c01713562f51847537c5724bc629ce4bdcf3bc.tar.xz |
X86: Rework the multiplication microops so that they work like they would in the patent.
--HG--
extra : convert_revision : 6fcf5dee440288d8bf92f6c5c2f97ef019975536
Diffstat (limited to 'src/arch/x86/isa/insts')
-rw-r--r-- | src/arch/x86/isa/insts/arithmetic/multiply_and_divide.py | 94 |
1 files changed, 60 insertions, 34 deletions
diff --git a/src/arch/x86/isa/insts/arithmetic/multiply_and_divide.py b/src/arch/x86/isa/insts/arithmetic/multiply_and_divide.py index 5f75b8868..197de5fb3 100644 --- a/src/arch/x86/isa/insts/arithmetic/multiply_and_divide.py +++ b/src/arch/x86/isa/insts/arithmetic/multiply_and_divide.py @@ -61,20 +61,29 @@ microcode = ''' def macroop MUL_B_R { - mul1u rax, rax, reg, dataSize="2" + mul1u rax, reg + mulel rax + # Really ah + muleh rsi, flags=(OF,CF) }; def macroop MUL_B_M { ld t1, seg, sib, disp - mul1u rax, rax, t1, dataSize="2" + mul1u rax, t1 + mulel rax + # Really ah + muleh rsi, flags=(OF,CF) }; def macroop MUL_B_P { rdip t7 ld t1, seg, riprel, disp - mul1u rax, rax, t1, dataSize="2" + mul1u rax, t1 + mulel rax + # Really ah + muleh rsi, flags=(OF,CF) }; # @@ -83,27 +92,26 @@ def macroop MUL_B_P def macroop MUL_R { - # We need to store the result of the multiplication in a temporary - # and then move it later because reg may be rdx. If it is, we can't - # clobber its old value yet. - muleh t1, rax, reg - mulel rax, rax, reg - mov rdx, rdx, t1 + mul1u rax, reg + mulel rax + muleh rdx, flags=(OF,CF) }; def macroop MUL_M { ld t1, seg, sib, disp - muleh rdx, rax, t1 - mulel rax, rax, t1 + mul1u rax, t1 + mulel rax + muleh rdx, flags=(OF,CF) }; def macroop MUL_P { rdip t7 ld t1, seg, riprel, disp - muleh rdx, rax, t1 - mulel rax, rax, t1 + mul1u rax, t1 + mulel rax + muleh rdx, flags=(OF,CF) }; # @@ -112,20 +120,29 @@ def macroop MUL_P def macroop IMUL_B_R { - mul1s rax, rax, reg, dataSize="2" + mul1s rax, reg + mulel rax + # Really ah + muleh rsi, flags=(OF,CF) }; def macroop IMUL_B_M { ld t1, seg, sib, disp - mul1s rax, rax, t1, dataSize="2" + mul1s rax, t1 + mulel rax + # Really ah + muleh rsi, flags=(OF,CF) }; def macroop IMUL_B_P { rdip t7 ld t1, seg, riprel, disp - mul1s rax, rax, t1, dataSize="2" + mul1s rax, t1 + mulel rax + # Really ah + muleh rsi, flags=(OF,CF) }; # @@ -134,47 +151,50 @@ def macroop IMUL_B_P def macroop IMUL_R { - mulehs t1, rax, reg - mulel rax, rax, reg - mov rdx, rdx, t1 + mul1s rax, reg + mulel rax + muleh rdx, flags=(OF,CF) }; def macroop IMUL_M { ld t1, seg, sib, disp - mulehs rdx, rax, t1 - mulel rax, rax, t1 + mul1s rax, t1 + mulel rax + muleh rdx, flags=(OF,CF) }; def macroop IMUL_P { rdip t7 ld t1, seg, riprel, disp - mulehs rdx, rax, t1 - mulel rax, rax, t1 + mul1s rax, t1 + mulel rax + muleh rdx, flags=(OF,CF) }; -# -# Two operand signed multiply. These should set the CF and OF flags if the -# result is too large for the destination register -# - def macroop IMUL_R_R { - mulel reg, reg, regm + mul1s reg, regm + mulel reg + muleh t0, flags=(CF,OF) }; def macroop IMUL_R_M { ld t1, seg, sib, disp - mulel reg, reg, t1 + mul1s reg, t1 + mulel reg + muleh t0, flags=(CF,OF) }; def macroop IMUL_R_P { rdip t7 ld t1, seg, riprel, disp - mulel reg, reg, t1 + mul1s reg, t1 + mulel reg + muleh t0, flags=(CF,OF) }; # @@ -184,14 +204,18 @@ def macroop IMUL_R_P def macroop IMUL_R_R_I { limm t1, imm - mulel reg, regm, t1 + mul1s regm, t1 + mulel reg + muleh t0, flags=(OF,CF) }; def macroop IMUL_R_M_I { limm t1, imm ld t2, seg, sib, disp - mulel reg, t2, t1 + mul1s t2, t1 + mulel reg + muleh t0, flags=(OF,CF) }; def macroop IMUL_R_P_I @@ -199,7 +223,9 @@ def macroop IMUL_R_P_I rdip t7 limm t1, imm ld t2, seg, riprel - mulel reg, t2, t1 + mul1s t2, t1 + mulel reg + muleh t0, flags=(OF,CF) }; # |