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authorGabe Black <gblack@eecs.umich.edu>2007-06-20 19:08:04 +0000
committerGabe Black <gblack@eecs.umich.edu>2007-06-20 19:08:04 +0000
commit77aa98d0f84343445588b3c137463e4eba4c2909 (patch)
treeb041ed55b4c999edfdb37fa383f1f821e62869a4 /src/arch/x86/isa/insts
parentc4ebfa850e141ae7b33184f061874f9576bf5a54 (diff)
downloadgem5-77aa98d0f84343445588b3c137463e4eba4c2909.tar.xz
Implement rip relative addressing and put in some missing loads and stores.
--HG-- extra : convert_revision : 99053414cef40f13c5226871a72909b2622d8c26
Diffstat (limited to 'src/arch/x86/isa/insts')
-rw-r--r--src/arch/x86/isa/insts/arithmetic/add_and_subtract.py16
-rw-r--r--src/arch/x86/isa/insts/compare_and_test/test.py17
-rw-r--r--src/arch/x86/isa/insts/data_transfer/move.py34
-rw-r--r--src/arch/x86/isa/insts/load_effective_address.py5
-rw-r--r--src/arch/x86/isa/insts/logical.py46
5 files changed, 106 insertions, 12 deletions
diff --git a/src/arch/x86/isa/insts/arithmetic/add_and_subtract.py b/src/arch/x86/isa/insts/arithmetic/add_and_subtract.py
index 349c2bb46..de66f70f3 100644
--- a/src/arch/x86/isa/insts/arithmetic/add_and_subtract.py
+++ b/src/arch/x86/isa/insts/arithmetic/add_and_subtract.py
@@ -61,9 +61,21 @@ def macroop SUB_R_I
def macroop SUB_M_I
{
- #Load into t1
+ ld "NUM_INTREGS+1", 3, ["env.scale", "env.index", "env.base"], \
+ "DISPLACEMENT"
subi "NUM_INTREGS+1", "NUM_INTREGS+1", "IMMEDIATE"
- #save from t1
+ st "NUM_INTREGS+1", 3, ["env.scale", "env.index", "env.base"], \
+ "DISPLACEMENT"
+};
+
+def macroop SUB_P_I
+{
+ rdip "NUM_INTREGS+7"
+ ld "NUM_INTREGS+1", 3, ["env.scale", "env.index", "env.base"], \
+ "DISPLACEMENT"
+ subi "NUM_INTREGS+1", "NUM_INTREGS+1", "IMMEDIATE"
+ st "NUM_INTREGS+1", 3, ["env.scale", "env.index", "env.base"], \
+ "DISPLACEMENT"
};
'''
#let {{
diff --git a/src/arch/x86/isa/insts/compare_and_test/test.py b/src/arch/x86/isa/insts/compare_and_test/test.py
index 36abab5d1..7b4ab0781 100644
--- a/src/arch/x86/isa/insts/compare_and_test/test.py
+++ b/src/arch/x86/isa/insts/compare_and_test/test.py
@@ -61,6 +61,14 @@ def macroop TEST_M_R
and "NUM_INTREGS", "NUM_INTREGS+1", "env.reg"
};
+def macroop TEST_P_R
+{
+ rdip "NUM_INTREGS+7"
+ ld "NUM_INTREGS+1", 3, ["env.scale", "env.index", "env.base"], \
+ "DISPLACEMENT"
+ and "NUM_INTREGS", "NUM_INTREGS+1", "env.reg"
+};
+
def macroop TEST_R_R
{
and "NUM_INTREGS", "env.reg", "env.regm"
@@ -74,6 +82,15 @@ def macroop TEST_M_I
and "NUM_INTREGS", "NUM_INTREGS+1", "NUM_INTREGS+2"
};
+def macroop TEST_P_I
+{
+ rdip "NUM_INTREGS+7"
+ ld "NUM_INTREGS+1", 3, ["env.scale", "env.index", "env.base"], \
+ "DISPLACEMENT"
+ limm "NUM_INTREGS+2", "IMMEDIATE"
+ and "NUM_INTREGS", "NUM_INTREGS+1", "NUM_INTREGS+2"
+};
+
def macroop TEST_R_I
{
limm "NUM_INTREGS+1", "IMMEDIATE"
diff --git a/src/arch/x86/isa/insts/data_transfer/move.py b/src/arch/x86/isa/insts/data_transfer/move.py
index c674329ea..662b2c373 100644
--- a/src/arch/x86/isa/insts/data_transfer/move.py
+++ b/src/arch/x86/isa/insts/data_transfer/move.py
@@ -62,17 +62,35 @@ def macroop MOV_M_R {
st "env.reg", 3, ["env.scale", "env.index", "env.base"], "DISPLACEMENT"
};
+def macroop MOV_P_R {
+ rdip "NUM_INTREGS+7"
+ st "env.reg", 3, ["env.scale", "env.index", "env.base"], "DISPLACEMENT"
+};
+
def macroop MOV_R_M {
ld "env.reg", 3, ["env.scale", "env.index", "env.base"], "DISPLACEMENT"
};
+def macroop MOV_R_P {
+ rdip "NUM_INTREGS+7"
+ ld "env.reg", 3, ["env.scale", "env.index", "env.base"], "DISPLACEMENT"
+};
+
def macroop MOV_R_I {
limm "env.reg", "IMMEDIATE"
};
def macroop MOV_M_I {
- limm "env.reg", "IMMEDIATE"
- #Do a store to put the register operand into memory
+ limm "NUM_INTREGS+1", "IMMEDIATE"
+ st "NUM_INTREGS+1", 3, ["env.scale", "env.index", "env.base"], \
+ "DISPLACEMENT"
+};
+
+def macroop MOV_P_I {
+ rdip "NUM_INTREGS+7"
+ limm "NUM_INTREGS+1", "IMMEDIATE"
+ st "NUM_INTREGS+1", 3, ["env.scale", "env.index", "env.base"], \
+ "DISPLACEMENT"
};
def macroop MOVSXD_R_R {
@@ -80,8 +98,16 @@ def macroop MOVSXD_R_R {
};
def macroop MOVSXD_R_M {
- #Do a load to fill the register operand from memory
- sext "env.reg", "env.regm", "env.dataSize"
+ ld "NUM_INTREGS+1", 3, ["env.scale", "env.index", "env.base"], \
+ "DISPLACEMENT"
+ sext "env.reg", "NUM_INTREGS+1", "env.dataSize"
+};
+
+def macroop MOVSXD_R_P {
+ rdip "NUM_INTREGS+7"
+ ld "NUM_INTREGS+1", 3, ["env.scale", "env.index", "env.base"], \
+ "DISPLACEMENT"
+ sext "env.reg", "NUM_INTREGS+1", "env.dataSize"
};
'''
#let {{
diff --git a/src/arch/x86/isa/insts/load_effective_address.py b/src/arch/x86/isa/insts/load_effective_address.py
index ac32638a0..f5f92ddbf 100644
--- a/src/arch/x86/isa/insts/load_effective_address.py
+++ b/src/arch/x86/isa/insts/load_effective_address.py
@@ -57,4 +57,9 @@ microcode = '''
def macroop LEA_R_M {
lea "env.reg", 3, ["env.scale", "env.index", "env.base"], "DISPLACEMENT"
};
+
+def macroop LEA_R_P {
+ rdip "NUM_INTREGS+7"
+ lea "env.reg", 3, ["env.scale", "env.index", "env.base"], "DISPLACEMENT"
+};
'''
diff --git a/src/arch/x86/isa/insts/logical.py b/src/arch/x86/isa/insts/logical.py
index 0b7c41208..d02bfd586 100644
--- a/src/arch/x86/isa/insts/logical.py
+++ b/src/arch/x86/isa/insts/logical.py
@@ -67,14 +67,35 @@ def macroop XOR_R_I
def macroop XOR_M_R
{
- #Do a load to get one of the sources
+ ld "NUM_INTREGS+1", 3, ["env.scale", "env.index", "env.base"], \
+ "DISPLACEMENT"
xor "NUM_INTREGS+1", "NUM_INTREGS+1", "env.reg"
- #Do a store to write the destination
+ st "NUM_INTREGS+1", 3, ["env.scale", "env.index", "env.base"], \
+ "DISPLACEMENT"
+};
+
+def macroop XOR_P_R
+{
+ rdip "NUM_INTREGS+7"
+ ld "NUM_INTREGS+1", 3, ["env.scale", "env.index", "env.base"], \
+ "DISPLACEMENT"
+ xor "NUM_INTREGS+1", "NUM_INTREGS+1", "env.reg"
+ st "NUM_INTREGS+1", 3, ["env.scale", "env.index", "env.base"], \
+ "DISPLACEMENT"
};
def macroop XOR_R_M
{
- #Do a load to get one of the sources
+ ld "NUM_INTREGS+1", 3, ["env.scale", "env.index", "env.base"], \
+ "DISPLACEMENT"
+ xor "env.reg", "env.reg", "NUM_INTREGS+1"
+};
+
+def macroop XOR_R_P
+{
+ rdip "NUM_INTREGS+7"
+ ld "NUM_INTREGS+1", 3, ["env.scale", "env.index", "env.base"], \
+ "DISPLACEMENT"
xor "env.reg", "env.reg", "NUM_INTREGS+1"
};
@@ -86,10 +107,23 @@ def macroop AND_R_I
def macroop AND_M_I
{
- #Do a load to get one of the sources
+ ld "NUM_INTREGS+2", 3, ["env.scale", "env.index", "env.base"], \
+ "DISPLACEMENT"
+ limm "NUM_INTREGS+1", "IMMEDIATE"
+ and "NUM_INTREGS+2", "NUM_INTREGS+2", "NUM_INTREGS+1"
+ st "NUM_INTREGS+2", 3, ["env.scale", "env.index", "env.base"], \
+ "DISPLACEMENT"
+};
+
+def macroop AND_P_I
+{
+ rdip "NUM_INTREGS+7"
+ ld "NUM_INTREGS+2", 3, ["env.scale", "env.index", "env.base"], \
+ "DISPLACEMENT"
limm "NUM_INTREGS+1", "IMMEDIATE"
- and "NUM_INTREGS+1", "NUM_INTREGS+1", "NUM_INTREGS+2"
- #Do a store to write the destination
+ and "NUM_INTREGS+2", "NUM_INTREGS+2", "NUM_INTREGS+1"
+ st "NUM_INTREGS+2", 3, ["env.scale", "env.index", "env.base"], \
+ "DISPLACEMENT"
};
'''
#let {{