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author | Gabe Black <gblack@eecs.umich.edu> | 2007-07-23 01:07:49 +0000 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2007-07-23 01:07:49 +0000 |
commit | 85f9415a67f3f3b54a615c2e29576235d11428f3 (patch) | |
tree | 599f0410465cca36d8b94ebc2a34d5a21501d987 /src/arch/x86/isa/macroop.isa | |
parent | 089fce4f59fd0086202e9cf5f7b2a46c6545f7b6 (diff) | |
download | gem5-85f9415a67f3f3b54a615c2e29576235d11428f3.tar.xz |
Make the operand size reflect the size specifier on the operand tags, and implement NEG
--HG--
extra : convert_revision : da73ed6820d57f083c18f44b2fa868fc0976dd16
Diffstat (limited to 'src/arch/x86/isa/macroop.isa')
-rw-r--r-- | src/arch/x86/isa/macroop.isa | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/src/arch/x86/isa/macroop.isa b/src/arch/x86/isa/macroop.isa index 8453a4fe9..4131246a4 100644 --- a/src/arch/x86/isa/macroop.isa +++ b/src/arch/x86/isa/macroop.isa @@ -196,18 +196,34 @@ let {{ self.regUsed = False self.regm = "0" self.regmUsed = False + self.size = None self.addressSize = "ADDRSIZE" self.dataSize = "OPSIZE" self.stackSize = "STACKSIZE" self.doModRM = False def getAllocator(self): + if self.size == 'b': + self.dataSize = 1 + elif self.size == 'd': + self.dataSize = 4 + elif self.size == 'q': + self.dataSize = 8 + elif self.size == 'v': + self.dataSize = "OPSIZE" + elif self.size == 'w': + self.dataSize = 2 + elif self.size == 'z': + self.dataSize = "((OPSIZE == 8) ? 4 : OPSIZE)" + elif self.size: + raise Exception, "Unrecognized size type %s!" % self.size return '''EmulEnv(%(reg)s, %(regm)s, %(dataSize)s, %(addressSize)s, %(stackSize)s)''' % \ self.__dict__ + def addReg(self, reg): if not self.regUsed: self.reg = reg @@ -217,6 +233,13 @@ let {{ self.regmUsed = True else: raise Exception, "EmulEnv is out of register specialization spots." + def setSize(self, size): + if not self.size: + self.size = size + else: + if self.size is not size: + raise Exception, "Conflicting register sizes %s and %s!" %\ + (self.size, size) }}; let {{ |