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authorGabe Black <gblack@eecs.umich.edu>2007-08-31 22:28:07 -0700
committerGabe Black <gblack@eecs.umich.edu>2007-08-31 22:28:07 -0700
commit9da070ce8a9cf40452b44621808586a5d2c2a189 (patch)
tree85d55c9bce21dde66c44f9037c5921edacd958db /src/arch/x86/isa/macroop.isa
parent9277545ba6b9a7756c34f90626860e44a833847d (diff)
downloadgem5-9da070ce8a9cf40452b44621808586a5d2c2a189.tar.xz
X86: Major rework of how regop microops are generated.
The new implementation uses metaclass, and gives a lot more precise control with a lot less verbosity. The flags/no flags reg/imm variants are all handled by the same python class now which supplies a constructor to the right C++ class based on context. --HG-- extra : convert_revision : 712e3ec6de7a5a038da083f79635fd7a687d56e5
Diffstat (limited to 'src/arch/x86/isa/macroop.isa')
-rw-r--r--src/arch/x86/isa/macroop.isa3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/arch/x86/isa/macroop.isa b/src/arch/x86/isa/macroop.isa
index fdfea6136..3f33c8cfe 100644
--- a/src/arch/x86/isa/macroop.isa
+++ b/src/arch/x86/isa/macroop.isa
@@ -153,7 +153,8 @@ def template MacroConstructor {{
let {{
from micro_asm import Combinational_Macroop, Rom_Macroop
class X86Macroop(Combinational_Macroop):
- def add_microop(self, microop):
+ def add_microop(self, mnemonic, microop):
+ microop.mnemonic = mnemonic
microop.micropc = len(self.microops)
self.microops.append(microop)
def setAdjustEnv(self, val):