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authorGabe Black <gblack@eecs.umich.edu>2007-12-01 23:01:17 -0800
committerGabe Black <gblack@eecs.umich.edu>2007-12-01 23:01:17 -0800
commit62c79ca63703ee2b2c5947016c0c5e10744c2479 (patch)
treee47c3ccb24647e643aea3959cd0d9e7b50f79858 /src/arch/x86/isa/microasm.isa
parent4e3ff42762f8fd08e130b10e59525139f12c932d (diff)
downloadgem5-62c79ca63703ee2b2c5947016c0c5e10744c2479.tar.xz
X86: Implement the lgdt instruction.
--HG-- extra : convert_revision : d1698a82df3c57cc9bbf8d5d190f271bfc7cb2e4
Diffstat (limited to 'src/arch/x86/isa/microasm.isa')
-rw-r--r--src/arch/x86/isa/microasm.isa11
1 files changed, 11 insertions, 0 deletions
diff --git a/src/arch/x86/isa/microasm.isa b/src/arch/x86/isa/microasm.isa
index 040bb2036..8c499eeed 100644
--- a/src/arch/x86/isa/microasm.isa
+++ b/src/arch/x86/isa/microasm.isa
@@ -80,6 +80,10 @@ let {{
# Add in symbols for the segment descriptor registers
for letter in ("C", "D", "E", "F", "G", "S"):
assembler.symbols["%ss" % letter.lower()] = "SEGMENT_REG_%sS" % letter
+
+ for reg in ("LDTR", "TR", "GDTR", "IDTR"):
+ assembler.symbols[reg.lower()] = "SYS_SEGMENT_REG_%s" % reg
+
# Miscellaneous symbols
symbols = {
"reg" : "env.reg",
@@ -138,6 +142,13 @@ let {{
env.dataSize = 8;
'''
+ assembler.symbols["oszForPseudoDesc"] = '''
+ if (machInst.mode.submode == SixtyFourBitMode)
+ env.dataSize = 8;
+ else
+ env.dataSize = 4;
+ '''
+
def trimImm(width):
return "adjustedImm = adjustedImm & mask(%s);" % width