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| author | Gabe Black <gblack@eecs.umich.edu> | 2007-12-01 23:03:39 -0800 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2007-12-01 23:03:39 -0800 |
| commit | dc6f96017135da7f3beae5055195de3cf8e47c6c (patch) | |
| tree | b8fad747c652fe34db462bf585be4d184da02d6b /src/arch/x86/isa/microasm.isa | |
| parent | a548067b01ed99d4abc9483ca11466d3d9d4ceca (diff) | |
| download | gem5-dc6f96017135da7f3beae5055195de3cf8e47c6c.tar.xz | |
X86: Reorganize segmentation and implement segment selector movs.
--HG--
extra : convert_revision : 553c3ffeda1f5312cf02493f602e7d4ba2fe66e8
Diffstat (limited to 'src/arch/x86/isa/microasm.isa')
| -rw-r--r-- | src/arch/x86/isa/microasm.isa | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/src/arch/x86/isa/microasm.isa b/src/arch/x86/isa/microasm.isa index 8c499eeed..9e8b65c4e 100644 --- a/src/arch/x86/isa/microasm.isa +++ b/src/arch/x86/isa/microasm.isa @@ -81,9 +81,12 @@ let {{ for letter in ("C", "D", "E", "F", "G", "S"): assembler.symbols["%ss" % letter.lower()] = "SEGMENT_REG_%sS" % letter - for reg in ("LDTR", "TR", "GDTR", "IDTR"): + for reg in ("TR", "IDTR"): assembler.symbols[reg.lower()] = "SYS_SEGMENT_REG_%s" % reg + for reg in ("TSL", "TSG"): + assembler.symbols[reg.lower()] = "SEGMENT_REG_%s" % reg + # Miscellaneous symbols symbols = { "reg" : "env.reg", @@ -112,7 +115,10 @@ let {{ # This segment selects an internal address space mapped to MSRs, # CPUID info, etc. - assembler.symbols["intseg"] = "SEGMENT_REG_INT" + assembler.symbols["intseg"] = "SEGMENT_REG_MS" + # This segment always has base 0, and doesn't imply any special handling + # like the internal segment above + assembler.symbols["flatseg"] = "SEGMENT_REG_LS" for reg in ('ax', 'bx', 'cx', 'dx', 'sp', 'bp', 'si', 'di'): assembler.symbols["r%s" % reg] = "INTREG_R%s" % reg.upper() |