summaryrefslogtreecommitdiff
path: root/src/arch/x86/isa/microasm.isa
diff options
context:
space:
mode:
authorGabe Black <gblack@eecs.umich.edu>2007-06-22 17:44:33 -0400
committerGabe Black <gblack@eecs.umich.edu>2007-06-22 17:44:33 -0400
commit16c1b5484f576b6aebea9ab5ffab4ea64f080de0 (patch)
tree68461974ae49e4bb5ee9d9ae10c6729e1b88eed6 /src/arch/x86/isa/microasm.isa
parent8e6abaed797d567b4ce009abac63ba19f87efa28 (diff)
parent70d6044527d6e6dfaf2de6674ae412706b6e131c (diff)
downloadgem5-16c1b5484f576b6aebea9ab5ffab4ea64f080de0.tar.xz
Merge zizzer.eecs.umich.edu:/bk/newmem
into zizzer.eecs.umich.edu:/.automount/wexford/x/gblack/newmem-o3-micro --HG-- extra : convert_revision : 3fa3fa4544ff8c9d2135e1befe6c8f4757006a2a
Diffstat (limited to 'src/arch/x86/isa/microasm.isa')
-rw-r--r--src/arch/x86/isa/microasm.isa3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/arch/x86/isa/microasm.isa b/src/arch/x86/isa/microasm.isa
index 4e06f4391..ee2b92f53 100644
--- a/src/arch/x86/isa/microasm.isa
+++ b/src/arch/x86/isa/microasm.isa
@@ -91,6 +91,9 @@ let {{
"osz" : "env.operandSize",
"ssz" : "env.stackSize"
}
+
+ for reg in ('ax', 'bx', 'cx', 'dx', 'sp', 'bp', 'si', 'di'):
+ assembler.symbols["r%s" % reg] = "INTREG_R%s" % reg.upper()
assembler.symbols.update(symbols)
# Code literal which forces a default 64 bit operand size in 64 bit mode.