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author | Gabe Black <gblack@eecs.umich.edu> | 2007-11-12 14:37:54 -0800 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2007-11-12 14:37:54 -0800 |
commit | aaa30714b3808a9283cda41bf29e167bf6b8edb0 (patch) | |
tree | adb8b30eb4a363e6b6f8687d730ec85b17c33b8e /src/arch/x86/isa/microasm.isa | |
parent | ada071db53208bf02afee79390d1169130ce99ed (diff) | |
download | gem5-aaa30714b3808a9283cda41bf29e167bf6b8edb0.tar.xz |
X86: Various fixes to indexing segmentation related registers
--HG--
extra : convert_revision : 3d45da3a3fb38327582cfdfb72cfc4ce1b1d31af
Diffstat (limited to 'src/arch/x86/isa/microasm.isa')
-rw-r--r-- | src/arch/x86/isa/microasm.isa | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/x86/isa/microasm.isa b/src/arch/x86/isa/microasm.isa index 0c43d4c13..e05582e37 100644 --- a/src/arch/x86/isa/microasm.isa +++ b/src/arch/x86/isa/microasm.isa @@ -108,7 +108,7 @@ let {{ # This segment selects an internal address space mapped to MSRs, # CPUID info, etc. - assembler.symbols["intseg"] = "NUM_SEGMENTREGS" + assembler.symbols["intseg"] = "SEGMENT_REG_INT" for reg in ('ax', 'bx', 'cx', 'dx', 'sp', 'bp', 'si', 'di'): assembler.symbols["r%s" % reg] = "INTREG_R%s" % reg.upper() |