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| author | Gabe Black <gblack@eecs.umich.edu> | 2007-09-04 23:31:40 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2007-09-04 23:31:40 -0700 |
| commit | af4c04c426cca3b73e58ab7464119db28252984c (patch) | |
| tree | 500f4bd45710fd73028f5946750aa88cb166533d /src/arch/x86/isa/microasm.isa | |
| parent | 310912cf2ccae3a4e9e3505cc3316d778daa2ec8 (diff) | |
| download | gem5-af4c04c426cca3b73e58ab7464119db28252984c.tar.xz | |
X86: Add floating point micro registers.
--HG--
extra : convert_revision : 442a5f8b9216638e4e6898f89eacb8695719e20f
Diffstat (limited to 'src/arch/x86/isa/microasm.isa')
| -rw-r--r-- | src/arch/x86/isa/microasm.isa | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/arch/x86/isa/microasm.isa b/src/arch/x86/isa/microasm.isa index dcc20c708..579909506 100644 --- a/src/arch/x86/isa/microasm.isa +++ b/src/arch/x86/isa/microasm.isa @@ -75,6 +75,8 @@ let {{ # Add in symbols for the microcode registers for num in range(15): assembler.symbols["t%d" % num] = "NUM_INTREGS+%d" % num + for num in range(7): + assembler.symbols["ufp%d" % num] = "FLOATREG_MICROFP(%d)" % num # Add in symbols for the segment descriptor registers for letter in ("C", "D", "E", "F", "G", "S"): assembler.symbols["%ss" % letter.lower()] = "SEGMENT_REG_%sS" % letter |