Merge more changes in from head.

--HG--
extra : convert_revision : 8f170f2754eccdb424a35b5b077225abcf6eee72

1 files changed, 16 insertions, 3 deletions

diff --git a/src/arch/x86/isa/microasm.isa b/src/arch/x86/isa/microasm.isa
index ee2b92f53..213468b0b 100644
--- a/src/arch/x86/isa/microasm.isa
+++ b/src/arch/x86/isa/microasm.isa
@@ -56,9 +56,9 @@
 // Authors: Gabe Black
 
 //Include the definitions of the micro ops.
-//These are StaticInst classes which stand on their own and make up an
-//internal instruction set, and also python representations which are passed
-//into the microcode assembler.
+//These are python representations of static insts which stand on their own
+//and make up an internal instruction set. They are used by the micro
+//assembler.
 ##include "microops/microops.isa"
 
 //Include code to build macroops in both C++ and python.
@@ -96,6 +96,19 @@ let {{
         assembler.symbols["r%s" % reg] = "INTREG_R%s" % reg.upper()
     assembler.symbols.update(symbols)
 
+    for flag in ('CF', 'PF', 'ECF', 'AF', 'EZF', 'ZF', 'SF', 'OF'):
+        assembler.symbols[flag] = flag + "Bit"
+
+    for cond in ('True', 'False', 'ECF', 'EZF', 'SZnZF',
+                 'MSTRZ', 'STRZ', 'MSTRC', 'STRZnZF',
+                 'OF', 'CF', 'ZF', 'CvZF',
+                 'SF', 'PF', 'SxOF', 'SxOvZF'):
+        assembler.symbols["C%s" % cond] = "ConditionTests::%s" % cond
+        assembler.symbols["nC%s" % cond] = "ConditionTests::Not%s" % cond
+
+    assembler.symbols["CTrue"] = "ConditionTests::True"
+    assembler.symbols["CFalse"] = "ConditionTests::False"
+
     # Code literal which forces a default 64 bit operand size in 64 bit mode.
     assembler.symbols["oszIn64Override"] = '''
     if (machInst.mode.submode == SixtyFourBitMode &&