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authorGabe Black <gabeblack@google.com>2017-12-13 01:03:00 -0800
committerGabe Black <gabeblack@google.com>2017-12-14 00:25:21 +0000
commit3f64b374c49491f18dc2ca538ed8c8597e4aac83 (patch)
tree6a8647fdb701ff2dfe6eb8f852160f85f6158ac2 /src/arch/x86/isa/microasm.isa
parenta45289dee8bc5fb325cab1429c6730dcaf86c58d (diff)
downloadgem5-3f64b374c49491f18dc2ca538ed8c8597e4aac83.tar.xz
x86: Use operand size 4 when it would be 2 for cmpxchg8b.
This means the instruction is treated as cmpxchg8b when the effective operand size is 16 bits. Change-Id: I4d9bb295f96097e1746a9bbccb2c579d14738fab Reviewed-on: https://gem5-review.googlesource.com/6603 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Gabe Black <gabeblack@google.com>
Diffstat (limited to 'src/arch/x86/isa/microasm.isa')
-rw-r--r--src/arch/x86/isa/microasm.isa5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/arch/x86/isa/microasm.isa b/src/arch/x86/isa/microasm.isa
index 3ceaf9b28..2ee27502c 100644
--- a/src/arch/x86/isa/microasm.isa
+++ b/src/arch/x86/isa/microasm.isa
@@ -180,6 +180,11 @@ let {{
env.dataSize = 4;
'''
+ assembler.symbols["clampOsz"] = '''
+ if (env.dataSize == 2)
+ env.dataSize = 4;
+ '''
+
def trimImm(width):
return "adjustedImm = adjustedImm & mask(%s);" % width