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authorGabe Black <gblack@eecs.umich.edu>2007-06-04 15:59:20 +0000
committerGabe Black <gblack@eecs.umich.edu>2007-06-04 15:59:20 +0000
commit41bc0fc5b27b97f6235e5cd3fe089ff43b588bef (patch)
tree7c29765ea484fd0fde4a6d82b0f03aba3203c856 /src/arch/x86/isa/microops/base.isa
parente47f1667b6f5f3b329c171a10d571696bd24b045 (diff)
downloadgem5-41bc0fc5b27b97f6235e5cd3fe089ff43b588bef.tar.xz
Reworking x86's microcode system. This is a work in progress, and X86 doesn't compile.
src/arch/x86/isa/decoder/one_byte_opcodes.isa: src/arch/x86/isa/macroop.isa: src/arch/x86/isa/main.isa: src/arch/x86/isa/microasm.isa: src/arch/x86/isa/microops/base.isa: src/arch/x86/isa/microops/microops.isa: src/arch/x86/isa/operands.isa: src/arch/x86/isa/microops/regop.isa: src/arch/x86/isa/microops/specop.isa: Reworking x86's microcode system --HG-- extra : convert_revision : cab66be59ed758b192226af17eddd5a86aa190f3
Diffstat (limited to 'src/arch/x86/isa/microops/base.isa')
-rw-r--r--src/arch/x86/isa/microops/base.isa202
1 files changed, 138 insertions, 64 deletions
diff --git a/src/arch/x86/isa/microops/base.isa b/src/arch/x86/isa/microops/base.isa
index f0aab7872..04cfa6e57 100644
--- a/src/arch/x86/isa/microops/base.isa
+++ b/src/arch/x86/isa/microops/base.isa
@@ -55,12 +55,10 @@
//
// Authors: Gabe Black
-//The operand types a microop template can be specialized with
-output header {{
- enum OperandType {
- RegisterOperand,
- ImmediateOperand
- };
+let {{
+ # This will be populated with mappings between microop mnemonics and
+ # the classes that represent them.
+ microopClasses = {}
}};
//A class which is the base of all x86 micro ops. It provides a function to
@@ -99,96 +97,172 @@ output header {{
};
}};
-// This sets up a class which is templated on the type of
-// arguments a particular flavor of a microcode instruction
-// can accept. It's parameters are specialized to create polymorphic
-// behavior in microops.
-def template BaseMicroOpTemplateDeclare {{
- template%(signature)s
- class %(class_name)s;
-}};
+//////////////////////////////////////////////////////////////////////////
+//
+// Base class for the python representation of x86 microops
let {{
- def buildBaseMicroOpTemplate(Name, numParams):
- assert(numParams > 0)
- signature = "<"
- signature += "int SignatureOperandTypeSpecifier0"
- for count in xrange(1,numParams):
- signature += \
- ", int SingatureOperandTypeSpecifier%d" % count
- signature += ">"
- subs = {"signature" : signature, "class_name" : Name}
- return BaseMicroOpTemplateDeclare.subst(subs)
+ class X86Microop(object):
+ def __init__(self, name):
+ self.name = name
+
+ # This converts a list of python bools into
+ # a comma seperated list of C++ bools.
+ def microFlagsText(self, vals):
+ text = ""
+ for val in vals:
+ if val:
+ text += ", true"
+ else:
+ text += ", false"
+ return text
+
+ def getAllocator(self, mnemonic, *microFlags):
+ return 'new %s(machInst, %s)' % (self.className, mnemonic, self.microFlagsText(microFlags))
}};
-let {{
- def buildMicroOpTemplateDict(*params):
- signature = "<"
- if len(params):
- signature += params[0]
- if len(params) > 1:
- for param in params[1:]:
- signature += ", %s" % param
- signature += ">"
- subs = {"param_dec" : "", "param_arg_dec" : "",
- "param_init" : "", "signature" : signature}
- for count in xrange(len(params)):
- subs["param_dec"] += "uint64_t param%d;\n" % count
- subs["param_arg_dec"] += ", uint64_t _param%d" % count
- subs["param_init"] += ", param%d(_param%d)" % (count, count)
- return subs
+//////////////////////////////////////////////////////////////////////////
+//
+// LdStOp Microop templates
+//
+//////////////////////////////////////////////////////////////////////////
+
+def template MicroLdStOpDeclare {{
+ class %(class_name)s : public X86MicroOpBase
+ {
+ protected:
+ const uint8_t scale;
+ const RegIndex index;
+ const RegIndex base;
+ const uint64_t disp;
+ const uint8_t segment;
+ const RegIndex data;
+ const uint8_t dataSize;
+ const uint8_t addressSize;
+ void buildMe();
+
+ public:
+ %(class_name)s(ExtMachInst _machInst,
+ const char * instMnem,
+ bool isMicro, bool isDelayed, bool isFirst, bool isLast,
+ uint8_t _scale, RegIndex _index, RegIndex _base,
+ uint64_t _disp, uint8_t _segment,
+ RegIndex _data,
+ uint8_t _dataSize, uint8_t _addressSize);
+
+ %(class_name)s(ExtMachInst _machInst,
+ const char * instMnem,
+ uint8_t _scale, RegIndex _index, RegIndex _base,
+ uint64_t _disp, uint8_t _segment,
+ RegIndex _data,
+ uint8_t _dataSize, uint8_t _addressSize);
+
+ %(BasicExecDeclare)s
+ };
}};
-// A tmeplate for building a specialized version of the microcode
-// instruction which specifies which arguments it wants
-def template MicroOpDeclare {{
- template<>
- class %(class_name)s%(signature)s : public X86MicroOpBase
+def template MicroLdStOpConstructor {{
+
+ inline void %(class_name)s::buildMe()
+ {
+ %(constructor)s;
+ }
+
+ inline %(class_name)s::%(class_name)s(
+ ExtMachInst machInst, const char * instMnem,
+ uint8_t _scale, RegIndex _index, RegIndex _base,
+ uint64_t _disp, uint8_t _segment,
+ RegIndex _data,
+ uint8_t _dataSize, uint8_t _addressSize) :
+ %(base_class)s(machInst, "%(mnemonic)s", instMnem,
+ false, false, false, false, %(op_class)s),
+ scale(_scale), index(_index), base(_base),
+ disp(_disp), segment(_segment),
+ data(_data),
+ dataSize(_dataSize), addressSize(_addressSize)
+ {
+ buildMe();
+ }
+
+ inline %(class_name)s::%(class_name)s(
+ ExtMachInst machInst, const char * instMnem,
+ bool isMicro, bool isDelayed, bool isFirst, bool isLast,
+ uint8_t _scale, RegIndex _index, RegIndex _base,
+ uint64_t _disp, uint8_t segment,
+ RegIndex data,
+ uint8_t dataSize, uint8_t addressSize) :
+ %(base_class)s(machInst, "%(mnemonic)s", instMnem,
+ isMicro, isDelayed, isFirst, isLast, %(op_class)s),
+ scale(_scale), index(_index), base(_base),
+ disp(_disp), segment(_segment),
+ data(_data),
+ dataSize(_dataSize), addressSize(_addressSize)
+ {
+ buildMe();
+ }
+}};
+
+//////////////////////////////////////////////////////////////////////////
+//
+// LIMMOp Microop templates
+//
+//////////////////////////////////////////////////////////////////////////
+
+def template MicroLIMMOpDeclare {{
+ class %(class_name)s : public X86MicroOpBase
{
protected:
- %(param_dec)s
+ const RegIndex dest;
+ const uint64_t imm;
void buildMe();
public:
%(class_name)s(ExtMachInst _machInst,
const char * instMnem,
- bool isMicro, bool isDelayed,
- bool isFirst, bool isLast
- %(param_arg_dec)s);
+ bool isMicro, bool isDelayed, bool isFirst, bool isLast,
+ RegIndex _dest, uint64_t _imm);
%(class_name)s(ExtMachInst _machInst,
- const char * instMnem
- %(param_arg_dec)s);
+ const char * instMnem,
+ RegIndex _dest, uint64_t _imm);
%(BasicExecDeclare)s
};
}};
-def template MicroOpConstructor {{
+def template MicroLIMMOpConstructor {{
- inline void %(class_name)s%(signature)s::buildMe()
+ inline void %(class_name)s::buildMe()
{
%(constructor)s;
}
- inline %(class_name)s%(signature)s::%(class_name)s(
- ExtMachInst machInst, const char * instMnem
- %(param_arg_dec)s) :
+ inline %(class_name)s::%(class_name)s(
+ ExtMachInst machInst, const char * instMnem,
+ RegIndex _dest, uint64_t _imm) :
%(base_class)s(machInst, "%(mnemonic)s", instMnem,
- false, false, false, false, %(op_class)s)
- %(param_init)s
+ false, false, false, false, %(op_class)s),
+ dest(_dest), imm(_imm)
{
buildMe();
}
- inline %(class_name)s%(signature)s::%(class_name)s(
+ inline %(class_name)s::%(class_name)s(
ExtMachInst machInst, const char * instMnem,
- bool isMicro, bool isDelayed, bool isFirst, bool isLast
- %(param_arg_dec)s)
- : %(base_class)s(machInst, "%(mnemonic)s", instMnem,
- isMicro, isDelayed, isFirst, isLast, %(op_class)s)
- %(param_init)s
+ bool isMicro, bool isDelayed, bool isFirst, bool isLast,
+ RegIndex _dest, uint64_t _imm) :
+ %(base_class)s(machInst, "%(mnemonic)s", instMnem,
+ isMicro, isDelayed, isFirst, isLast, %(op_class)s),
+ dest(_dest), imm(_imm)
{
buildMe();
}
}};
+
+//////////////////////////////////////////////////////////////////////////
+//
+// FpOp Microop templates
+//
+//////////////////////////////////////////////////////////////////////////
+
+//TODO Actually write an fp microop base class.