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| author | Gabe Black <gblack@eecs.umich.edu> | 2007-08-31 22:28:07 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2007-08-31 22:28:07 -0700 |
| commit | 9da070ce8a9cf40452b44621808586a5d2c2a189 (patch) | |
| tree | 85d55c9bce21dde66c44f9037c5921edacd958db /src/arch/x86/isa/microops/base.isa | |
| parent | 9277545ba6b9a7756c34f90626860e44a833847d (diff) | |
| download | gem5-9da070ce8a9cf40452b44621808586a5d2c2a189.tar.xz | |
X86: Major rework of how regop microops are generated.
The new implementation uses metaclass, and gives a lot more precise control
with a lot less verbosity. The flags/no flags reg/imm variants are all handled
by the same python class now which supplies a constructor to the right C++
class based on context.
--HG--
extra : convert_revision : 712e3ec6de7a5a038da083f79635fd7a687d56e5
Diffstat (limited to 'src/arch/x86/isa/microops/base.isa')
| -rw-r--r-- | src/arch/x86/isa/microops/base.isa | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/arch/x86/isa/microops/base.isa b/src/arch/x86/isa/microops/base.isa index 71fc3b3a5..9722f182e 100644 --- a/src/arch/x86/isa/microops/base.isa +++ b/src/arch/x86/isa/microops/base.isa @@ -69,6 +69,7 @@ let {{ let {{ class X86Microop(object): + def __init__(self, name): self.name = name @@ -88,7 +89,8 @@ let {{ return text def getAllocator(self, mnemonic, *microFlags): - return 'new %s(machInst, %s)' % (self.className, mnemonic, self.microFlagsText(microFlags)) + return 'new %s(machInst, %s)' % \ + (self.className, mnemonic, self.microFlagsText(microFlags)) }}; ////////////////////////////////////////////////////////////////////////// |