summaryrefslogtreecommitdiff
path: root/src/arch/x86/isa/microops/base.isa
diff options
context:
space:
mode:
authorGabe Black <gblack@eecs.umich.edu>2007-06-12 16:21:47 +0000
committerGabe Black <gblack@eecs.umich.edu>2007-06-12 16:21:47 +0000
commita7f3bbcfab9d54387517c2a52e56bfefee092901 (patch)
tree18c3cd95448ba54673aa1e588e8eb50ab3cbc705 /src/arch/x86/isa/microops/base.isa
parent1493ceda8fe242776423e30f83db0774f6558ad4 (diff)
downloadgem5-a7f3bbcfab9d54387517c2a52e56bfefee092901.tar.xz
Make microOp vs microop and macroOp vs macroop capitilization consistent.
src/arch/x86/isa/macroop.isa: Make microOp vs microop and macroOp vs macroop capitilization consistent. Also fill out the emulation environment handling a little more, and use an object to pass around output code. src/arch/x86/isa/microops/base.isa: Make microOp vs microop and macroOp vs macroop capitilization consistent. Also adjust python to C++ bool translation. --HG-- extra : convert_revision : 6f4bacfa334c42732c845f9a7f211cbefc73f96f
Diffstat (limited to 'src/arch/x86/isa/microops/base.isa')
-rw-r--r--src/arch/x86/isa/microops/base.isa24
1 files changed, 14 insertions, 10 deletions
diff --git a/src/arch/x86/isa/microops/base.isa b/src/arch/x86/isa/microops/base.isa
index 7fa4f0457..a066d4802 100644
--- a/src/arch/x86/isa/microops/base.isa
+++ b/src/arch/x86/isa/microops/base.isa
@@ -64,14 +64,14 @@ let {{
//A class which is the base of all x86 micro ops. It provides a function to
//set necessary flags appropriately.
output header {{
- class X86MicroOpBase : public X86StaticInst
+ class X86MicroopBase : public X86StaticInst
{
protected:
const char * instMnem;
uint8_t opSize;
uint8_t addrSize;
- X86MicroOpBase(ExtMachInst _machInst,
+ X86MicroopBase(ExtMachInst _machInst,
const char *mnem, const char *_instMnem,
bool isMicro, bool isDelayed,
bool isFirst, bool isLast,
@@ -79,10 +79,10 @@ output header {{
X86StaticInst(mnem, _machInst, __opClass),
instMnem(_instMnem)
{
- flags[IsMicroOp] = isMicro;
+ flags[IsMicroop] = isMicro;
flags[IsDelayedCommit] = isDelayed;
- flags[IsFirstMicroOp] = isFirst;
- flags[IsLastMicroOp] = isLast;
+ flags[IsFirstMicroop] = isFirst;
+ flags[IsLastMicroop] = isLast;
}
std::string generateDisassembly(Addr pc,
@@ -108,15 +108,19 @@ let {{
def __init__(self, name):
self.name = name
+ # This converts a python bool into a C++ bool
+ def cppBool(self, val):
+ if val:
+ return "true"
+ else:
+ return "false"
+
# This converts a list of python bools into
# a comma seperated list of C++ bools.
def microFlagsText(self, vals):
text = ""
for val in vals:
- if val:
- text += ", true"
- else:
- text += ", false"
+ text += ", %s" % self.cppBool(val)
return text
def getAllocator(self, mnemonic, *microFlags):
@@ -130,7 +134,7 @@ let {{
//////////////////////////////////////////////////////////////////////////
def template MicroLdStOpDeclare {{
- class %(class_name)s : public X86MicroOpBase
+ class %(class_name)s : public X86MicroopBase
{
protected:
const uint8_t scale;