summaryrefslogtreecommitdiff
path: root/src/arch/x86/isa/microops/ldstop.isa
diff options
context:
space:
mode:
authorGabe Black <gblack@eecs.umich.edu>2007-07-19 15:15:47 -0700
committerGabe Black <gblack@eecs.umich.edu>2007-07-19 15:15:47 -0700
commitcfadef74d1d7ce47d0bd30a14a509a15a354849a (patch)
treedc6329821c2cf83843b4a3a03bbc26c619ea6a98 /src/arch/x86/isa/microops/ldstop.isa
parent09f056a1ef324b540818f1d85377fb09af44a0f1 (diff)
downloadgem5-cfadef74d1d7ce47d0bd30a14a509a15a354849a.tar.xz
x86 fixes
Make the emulation environment consider the rex prefix. Implement and hook in forms of j, jmp, cmp, syscall, movzx Added a format for an instruction to carry a call to the SE mode syscalls system Made memory instructions which refer to the rip do so directly Made the operand size overridable in the microassembly Made the "ext" field of register operations 16 bits to hold a sparse encoding of flags to set or conditions to predicate on Added an explicit "rax" operand for the syscall format Implemented syscall returns. --HG-- extra : convert_revision : ae84bd8c6a1d400906e17e8b8c4185f2ebd4c5f2
Diffstat (limited to 'src/arch/x86/isa/microops/ldstop.isa')
-rw-r--r--src/arch/x86/isa/microops/ldstop.isa22
1 files changed, 14 insertions, 8 deletions
diff --git a/src/arch/x86/isa/microops/ldstop.isa b/src/arch/x86/isa/microops/ldstop.isa
index 9ceaaac19..baa692f83 100644
--- a/src/arch/x86/isa/microops/ldstop.isa
+++ b/src/arch/x86/isa/microops/ldstop.isa
@@ -325,12 +325,12 @@ def template MicroLdStOpConstructor {{
let {{
class LdStOp(X86Microop):
- def __init__(self, data, segment, addr, disp):
+ def __init__(self, data, segment, addr, disp, dataSize):
self.data = data
[self.scale, self.index, self.base] = addr
self.disp = disp
self.segment = segment
- self.dataSize = "env.dataSize"
+ self.dataSize = dataSize
self.addressSize = "env.addressSize"
def getAllocator(self, *microFlags):
@@ -376,8 +376,10 @@ let {{
exec_output += MicroLoadCompleteAcc.subst(iop)
class LoadOp(LdStOp):
- def __init__(self, data, segment, addr, disp = 0):
- super(LoadOp, self).__init__(data, segment, addr, disp)
+ def __init__(self, data, segment, addr,
+ disp = 0, dataSize="env.dataSize"):
+ super(LoadOp, self).__init__(data, segment,
+ addr, disp, dataSize)
self.className = Name
self.mnemonic = name
@@ -403,8 +405,10 @@ let {{
exec_output += MicroStoreCompleteAcc.subst(iop)
class StoreOp(LdStOp):
- def __init__(self, data, segment, addr, disp = 0):
- super(StoreOp, self).__init__(data, segment, addr, disp)
+ def __init__(self, data, segment, addr,
+ disp = 0, dataSize="env.dataSize"):
+ super(StoreOp, self).__init__(data, segment,
+ addr, disp, dataSize)
self.className = Name
self.mnemonic = name
@@ -419,8 +423,10 @@ let {{
exec_output += MicroLeaExecute.subst(iop)
class LeaOp(LdStOp):
- def __init__(self, data, segment, addr, disp = 0):
- super(LeaOp, self).__init__(data, segment, addr, disp)
+ def __init__(self, data, segment, addr,
+ disp = 0, dataSize="env.dataSize"):
+ super(LeaOp, self).__init__(data, segment,
+ addr, disp, dataSize)
self.className = "Lea"
self.mnemonic = "lea"