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| author | Gabe Black <gblack@eecs.umich.edu> | 2009-04-19 04:55:43 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2009-04-19 04:55:43 -0700 |
| commit | d2554ff0304af0d4b365894026b702b5714385d6 (patch) | |
| tree | 4b46ce009b9cfe05c86ad417df4d3cc9bb3b8e7e /src/arch/x86/isa/microops/ldstop.isa | |
| parent | 1a8a765a5c2f7aeca0569ca8b7e7f653aaa9d8d7 (diff) | |
| download | gem5-d2554ff0304af0d4b365894026b702b5714385d6.tar.xz | |
X86: Implement the ldstl microop.
This microop does a load, checks that a store would succeed, and locks the
requested address.
Diffstat (limited to 'src/arch/x86/isa/microops/ldstop.isa')
| -rw-r--r-- | src/arch/x86/isa/microops/ldstop.isa | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/arch/x86/isa/microops/ldstop.isa b/src/arch/x86/isa/microops/ldstop.isa index 24ddd0b43..5df423ea9 100644 --- a/src/arch/x86/isa/microops/ldstop.isa +++ b/src/arch/x86/isa/microops/ldstop.isa @@ -440,6 +440,8 @@ let {{ defineMicroLoadOp('Ld', 'Data = merge(Data, Mem, dataSize);') defineMicroLoadOp('Ldst', 'Data = merge(Data, Mem, dataSize);', 'X86ISA::StoreCheck') + defineMicroLoadOp('Ldstl', 'Data = merge(Data, Mem, dataSize);', + 'X86ISA::StoreCheck | Request::LOCKED') defineMicroLoadOp('Ldfp', 'FpData.uqw = Mem;') def defineMicroStoreOp(mnemonic, code, \ |