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authorGabe Black <gblack@eecs.umich.edu>2007-06-18 14:15:00 +0000
committerGabe Black <gblack@eecs.umich.edu>2007-06-18 14:15:00 +0000
commit6c125779372ecc7c9482f6e79bd4c5c0c99ad7ec (patch)
tree8ed9dc671fe4c0fdd557ae08b7e706c2353fd22c /src/arch/x86/isa/microops/limmop.isa
parent3ceb0a46ae98fb14d48f45338d223d6c8a2c7509 (diff)
downloadgem5-6c125779372ecc7c9482f6e79bd4c5c0c99ad7ec.tar.xz
Add in incomplete pick and merge functions which read and write pieces of registers, and fill out microcode disassembly.
--HG-- extra : convert_revision : 56332b3999a9079b1bd305ee2826abdf593367e1
Diffstat (limited to 'src/arch/x86/isa/microops/limmop.isa')
-rw-r--r--src/arch/x86/isa/microops/limmop.isa18
1 files changed, 18 insertions, 0 deletions
diff --git a/src/arch/x86/isa/microops/limmop.isa b/src/arch/x86/isa/microops/limmop.isa
index c76c074b1..141d7523f 100644
--- a/src/arch/x86/isa/microops/limmop.isa
+++ b/src/arch/x86/isa/microops/limmop.isa
@@ -79,6 +79,9 @@ def template MicroLimmOpDeclare {{
const uint64_t imm;
void buildMe();
+ std::string generateDisassembly(Addr pc,
+ const SymbolTable *symtab) const;
+
public:
%(class_name)s(ExtMachInst _machInst,
const char * instMnem,
@@ -93,6 +96,20 @@ def template MicroLimmOpDeclare {{
};
}};
+def template MicroLimmOpDisassembly {{
+ std::string %(class_name)s::generateDisassembly(Addr pc,
+ const SymbolTable *symtab) const
+ {
+ std::stringstream response;
+
+ printMnemonic(response, instMnem, mnemonic);
+ printReg(response, dest);
+ response << ", ";
+ ccprintf(response, "%#x", imm);
+ return response.str();
+ }
+}};
+
def template MicroLimmOpConstructor {{
inline void %(class_name)s::buildMe()
@@ -148,5 +165,6 @@ let {{
{"code" : "DestReg = imm;"})
header_output += MicroLimmOpDeclare.subst(iop)
decoder_output += MicroLimmOpConstructor.subst(iop)
+ decoder_output += MicroLimmOpDisassembly.subst(iop)
exec_output += MicroLimmOpExecute.subst(iop)
}};