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| author | Gabe Black <gblack@eecs.umich.edu> | 2007-06-12 16:21:47 +0000 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2007-06-12 16:21:47 +0000 |
| commit | a7f3bbcfab9d54387517c2a52e56bfefee092901 (patch) | |
| tree | 18c3cd95448ba54673aa1e588e8eb50ab3cbc705 /src/arch/x86/isa/microops/limmop.isa | |
| parent | 1493ceda8fe242776423e30f83db0774f6558ad4 (diff) | |
| download | gem5-a7f3bbcfab9d54387517c2a52e56bfefee092901.tar.xz | |
Make microOp vs microop and macroOp vs macroop capitilization consistent.
src/arch/x86/isa/macroop.isa:
Make microOp vs microop and macroOp vs macroop capitilization consistent. Also fill out the emulation environment handling a little more, and use an object to pass around output code.
src/arch/x86/isa/microops/base.isa:
Make microOp vs microop and macroOp vs macroop capitilization consistent. Also adjust python to C++ bool translation.
--HG--
extra : convert_revision : 6f4bacfa334c42732c845f9a7f211cbefc73f96f
Diffstat (limited to 'src/arch/x86/isa/microops/limmop.isa')
| -rw-r--r-- | src/arch/x86/isa/microops/limmop.isa | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/x86/isa/microops/limmop.isa b/src/arch/x86/isa/microops/limmop.isa index 5fce37126..a25d2b712 100644 --- a/src/arch/x86/isa/microops/limmop.isa +++ b/src/arch/x86/isa/microops/limmop.isa @@ -72,7 +72,7 @@ def template MicroLimmOpExecute {{ }}; def template MicroLimmOpDeclare {{ - class %(class_name)s : public X86MicroOpBase + class %(class_name)s : public X86MicroopBase { protected: const RegIndex dest; @@ -141,7 +141,7 @@ let {{ let {{ # Build up the all register version of this micro op - iop = InstObjParams("limm", "Limm", 'X86MicroOpBase', + iop = InstObjParams("limm", "Limm", 'X86MicroopBase', {"code" : "DestReg = imm;"}) header_output += MicroLimmOpDeclare.subst(iop) decoder_output += MicroLimmOpConstructor.subst(iop) |