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| author | Gabe Black <gblack@eecs.umich.edu> | 2007-07-19 15:15:47 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2007-07-19 15:15:47 -0700 |
| commit | cfadef74d1d7ce47d0bd30a14a509a15a354849a (patch) | |
| tree | dc6329821c2cf83843b4a3a03bbc26c619ea6a98 /src/arch/x86/isa/microops/regop.isa | |
| parent | 09f056a1ef324b540818f1d85377fb09af44a0f1 (diff) | |
| download | gem5-cfadef74d1d7ce47d0bd30a14a509a15a354849a.tar.xz | |
x86 fixes
Make the emulation environment consider the rex prefix.
Implement and hook in forms of j, jmp, cmp, syscall, movzx
Added a format for an instruction to carry a call to the SE mode syscalls system
Made memory instructions which refer to the rip do so directly
Made the operand size overridable in the microassembly
Made the "ext" field of register operations 16 bits to hold a sparse encoding of flags to set or conditions to predicate on
Added an explicit "rax" operand for the syscall format
Implemented syscall returns.
--HG--
extra : convert_revision : ae84bd8c6a1d400906e17e8b8c4185f2ebd4c5f2
Diffstat (limited to 'src/arch/x86/isa/microops/regop.isa')
| -rw-r--r-- | src/arch/x86/isa/microops/regop.isa | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/src/arch/x86/isa/microops/regop.isa b/src/arch/x86/isa/microops/regop.isa index 37cbaa8c6..f833f89be 100644 --- a/src/arch/x86/isa/microops/regop.isa +++ b/src/arch/x86/isa/microops/regop.isa @@ -126,12 +126,12 @@ def template MicroRegOpDeclare {{ const char * instMnem, bool isMicro, bool isDelayed, bool isFirst, bool isLast, RegIndex _src1, RegIndex _src2, RegIndex _dest, - uint8_t _dataSize, uint8_t _ext); + uint8_t _dataSize, uint16_t _ext); %(class_name)s(ExtMachInst _machInst, const char * instMnem, RegIndex _src1, RegIndex _src2, RegIndex _dest, - uint8_t _dataSize, uint8_t _ext); + uint8_t _dataSize, uint16_t _ext); %(BasicExecDeclare)s }; @@ -149,12 +149,12 @@ def template MicroRegOpImmDeclare {{ const char * instMnem, bool isMicro, bool isDelayed, bool isFirst, bool isLast, RegIndex _src1, uint8_t _imm8, RegIndex _dest, - uint8_t _dataSize, uint8_t _ext); + uint8_t _dataSize, uint16_t _ext); %(class_name)sImm(ExtMachInst _machInst, const char * instMnem, RegIndex _src1, uint8_t _imm8, RegIndex _dest, - uint8_t _dataSize, uint8_t _ext); + uint8_t _dataSize, uint16_t _ext); %(BasicExecDeclare)s }; @@ -170,7 +170,7 @@ def template MicroRegOpConstructor {{ inline %(class_name)s::%(class_name)s( ExtMachInst machInst, const char * instMnem, RegIndex _src1, RegIndex _src2, RegIndex _dest, - uint8_t _dataSize, uint8_t _ext) : + uint8_t _dataSize, uint16_t _ext) : %(base_class)s(machInst, "%(mnemonic)s", instMnem, false, false, false, false, _src1, _src2, _dest, _dataSize, _ext, @@ -183,7 +183,7 @@ def template MicroRegOpConstructor {{ ExtMachInst machInst, const char * instMnem, bool isMicro, bool isDelayed, bool isFirst, bool isLast, RegIndex _src1, RegIndex _src2, RegIndex _dest, - uint8_t _dataSize, uint8_t _ext) : + uint8_t _dataSize, uint16_t _ext) : %(base_class)s(machInst, "%(mnemonic)s", instMnem, isMicro, isDelayed, isFirst, isLast, _src1, _src2, _dest, _dataSize, _ext, @@ -203,7 +203,7 @@ def template MicroRegOpImmConstructor {{ inline %(class_name)sImm::%(class_name)sImm( ExtMachInst machInst, const char * instMnem, RegIndex _src1, uint8_t _imm8, RegIndex _dest, - uint8_t _dataSize, uint8_t _ext) : + uint8_t _dataSize, uint16_t _ext) : %(base_class)s(machInst, "%(mnemonic)s", instMnem, false, false, false, false, _src1, _imm8, _dest, _dataSize, _ext, @@ -216,7 +216,7 @@ def template MicroRegOpImmConstructor {{ ExtMachInst machInst, const char * instMnem, bool isMicro, bool isDelayed, bool isFirst, bool isLast, RegIndex _src1, uint8_t _imm8, RegIndex _dest, - uint8_t _dataSize, uint8_t _ext) : + uint8_t _dataSize, uint16_t _ext) : %(base_class)s(machInst, "%(mnemonic)s", instMnem, isMicro, isDelayed, isFirst, isLast, _src1, _imm8, _dest, _dataSize, _ext, |