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| author | Gabe Black <gblack@eecs.umich.edu> | 2008-10-12 20:33:37 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2008-10-12 20:33:37 -0700 |
| commit | 30feb90c1cba922a7dac38204900e29b4788b935 (patch) | |
| tree | e88b90d845a832595a97de1946a4802fb7218957 /src/arch/x86/isa/microops/regop.isa | |
| parent | 15f5bb3055b70a43ba8b504b1453f51b2a6e1ee3 (diff) | |
| download | gem5-30feb90c1cba922a7dac38204900e29b4788b935.tar.xz | |
X86: Add a check type for interrupt gates.
Diffstat (limited to 'src/arch/x86/isa/microops/regop.isa')
| -rw-r--r-- | src/arch/x86/isa/microops/regop.isa | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/src/arch/x86/isa/microops/regop.isa b/src/arch/x86/isa/microops/regop.isa index b7883b2e2..0d019729f 100644 --- a/src/arch/x86/isa/microops/regop.isa +++ b/src/arch/x86/isa/microops/regop.isa @@ -233,7 +233,7 @@ output header {{ uint64_t "ient, uint64_t &remainder); enum SegmentSelectorCheck { - SegNoCheck, SegCSCheck, SegCallGateCheck, + SegNoCheck, SegCSCheck, SegCallGateCheck, SegIntGateCheck, SegSSCheck, SegIretCheck, SegIntCSCheck }; }}; @@ -1041,6 +1041,11 @@ let {{ panic("CS checks for far calls/jumps through call gates" "not implemented.\\n"); break; + case SegIntGateCheck: + if (desc.dpl < m5reg.cpl) { + return new GeneralProtection((uint16_t)selector); + } + break; case SegSSCheck: if (selector.si || selector.ti) { if (!desc.p) { |