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| author | Gabe Black <gblack@eecs.umich.edu> | 2009-02-01 17:05:37 -0800 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2009-02-01 17:05:37 -0800 |
| commit | 6b53b8387e1a0c05d878d47962c27bf7493b6d36 (patch) | |
| tree | 07f203425bf7401c3de0b473b0c594dc595ed0ed /src/arch/x86/isa/microops/regop.isa | |
| parent | c0cd58812e23ff540c0ef80203f1baad16a9eda1 (diff) | |
| download | gem5-6b53b8387e1a0c05d878d47962c27bf7493b6d36.tar.xz | |
X86: Make the chks microop check for the right int descriptor type.
Diffstat (limited to 'src/arch/x86/isa/microops/regop.isa')
| -rw-r--r-- | src/arch/x86/isa/microops/regop.isa | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/arch/x86/isa/microops/regop.isa b/src/arch/x86/isa/microops/regop.isa index 492452a51..200024690 100644 --- a/src/arch/x86/isa/microops/regop.isa +++ b/src/arch/x86/isa/microops/regop.isa @@ -1067,9 +1067,15 @@ let {{ "not implemented.\\n"); break; case SegIntGateCheck: + // Check permissions. if (desc.dpl < m5reg.cpl) { fault = new GeneralProtection((uint16_t)selector); } + // Make sure the gate's the right type. + if (m5reg.mode == LongMode && ((desc.type & 0xe) != 0xe) || + ((desc.type & 0x6) != 0x6)) { + fault = new GeneralProtection(0); + } break; case SegSSCheck: if (selector.si || selector.ti) { |