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authorGabe Black <gblack@eecs.umich.edu>2007-09-04 23:42:55 -0700
committerGabe Black <gblack@eecs.umich.edu>2007-09-04 23:42:55 -0700
commit6c689a3b4b3991342200bb2a433fdf7fbd76b4fc (patch)
treecff1b4cd2d41c5b6f4998fa3509d9177ca1b14a5 /src/arch/x86/isa/microops/regop.isa
parent26ba7cc3b233ae2b3c036de2998e0c5e0a4c340d (diff)
downloadgem5-6c689a3b4b3991342200bb2a433fdf7fbd76b4fc.tar.xz
X86: Make the movfp microop use FloatRegBits instead of FloatRegs.
This fixes a problem where interpreting arbitrary bits as floating point would change what the value was. These values are legitimate because the fp registers could be used to move around arbitrary data. --HG-- extra : convert_revision : f1d7159ba137702b5722cc7c1b64ed7dd06c21de
Diffstat (limited to 'src/arch/x86/isa/microops/regop.isa')
-rw-r--r--src/arch/x86/isa/microops/regop.isa4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/x86/isa/microops/regop.isa b/src/arch/x86/isa/microops/regop.isa
index 1d9299ff3..589113ba3 100644
--- a/src/arch/x86/isa/microops/regop.isa
+++ b/src/arch/x86/isa/microops/regop.isa
@@ -489,8 +489,8 @@ let {{
else_code = 'DestReg=DestReg;'
class Movfp(CondRegOp):
- code = 'FpDestReg = FpSrcReg2'
- else_code = 'FpDestReg = FpDestReg;'
+ code = 'FpDestReg.uqw = FpSrcReg2.uqw;'
+ else_code = 'FpDestReg.uqw = FpDestReg.uqw;'
# Shift instructions